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SI7402DN-T1 PDF预览

SI7402DN-T1

更新时间: 2024-11-02 15:51:15
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
6页 101K
描述
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET

SI7402DN-T1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:compliant
风险等级:5.9配置:Single
最大漏极电流 (Abs) (ID):13 AFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-609代码:e0工作模式:ENHANCEMENT MODE
最高工作温度:150 °C极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):3.8 W子类别:FET General Purpose Power
表面贴装:YES端子面层:Tin/Lead (Sn/Pb)
Base Number Matches:1

SI7402DN-T1 数据手册

 浏览型号SI7402DN-T1的Datasheet PDF文件第2页浏览型号SI7402DN-T1的Datasheet PDF文件第3页浏览型号SI7402DN-T1的Datasheet PDF文件第4页浏览型号SI7402DN-T1的Datasheet PDF文件第5页浏览型号SI7402DN-T1的Datasheet PDF文件第6页 
Si7402DN  
Vishay Siliconix  
N-Channel 12-V (D-S) MOSFET  
FEATURES  
PRODUCT SUMMARY  
D TrenchFETr Power MOSFET  
VDS (V)  
rDS(on) ( )  
ID (A)  
D New Low Thermal Resistance PowerPAKr  
Package with Low 1.07-mm Profile  
0.0057 @ V = 4.5 V  
GS  
20  
RoHS  
COMPLIANT  
Available  
0.0067 @ V = 2.5 V  
GS  
18.8  
16.5  
12  
APPLICATIONS  
0.0085 @ V = 1.8 V  
GS  
D PA Switch, Load Switch and Battery Switch  
for Portable Devices  
D Point-of-Load for 5-V or 3.3-V BUS Stepdown  
PowerPAK 1212-8  
D
S
3.30 mm  
3.30 mm  
1
S
2
S
3
G
G
4
D
8
D
7
D
S
6
D
5
N-Channel MOSFET  
Bottom View  
Ordering Information: Si7402DN-T1  
Si7402DN-T1—E3 (Lead (Pb)-Free)  
ABSOLUTE MAXIMUM RATINGS (T = 25_C UNLESS OTHERWISE NOTED)  
A
Parameter  
Symbol  
10 secs  
Steady State  
Unit  
Drain-Source Voltage  
Gate-Source Voltage  
V
12  
DS  
V
V
GS  
"8  
T
= 25_C  
= 70_C  
20  
16  
13  
10  
A
a
Continuous Drain Current (T = 150_C)  
I
J
D
T
A
A
Pulsed Drain Current  
I
50  
DM  
a
Continuous Source Current (Diode Conduction)  
I
3.2  
3.8  
2.4  
1.3  
1.5  
1.0  
S
T
= 25_C  
= 70_C  
A
a
Maximum Power Dissipation  
P
W
D
T
A
Operating Junction and Storage Temperature Range  
T , T  
–55 to 150  
260  
J
stg  
_C  
b,c  
Soldering Recommendations (Peak Temperature)  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
Typical  
Maximum  
Unit  
t v 10 sec  
Steady State  
Steady State  
24  
65  
33  
81  
a
Maximum Junction-to-Ambient  
R
thJA  
R
thJC  
_C/W  
Maximum Junction-to-Case (Drain)  
1.9  
2.4  
Notes  
a. Surface Mounted on 1” x 1” FR4 Board.  
b. See Solder Profile (http://www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not  
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure  
adequate bottom side solder interconnection.  
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.  
Document Number: 72646  
S-32522—Rev. A, 08-Dec-03  
www.vishay.com  
1

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