Datasheet > SI531

SI531

更新时间： 2024-11-09 03:32:07

品牌	Logo	应用领域
芯科 - SILICON		振荡器晶体振荡器石英晶振
页数	文件大小	规格书
10页	184K
描述
CRYSTAL OSCILLATOR (XO) (10 MHZ TO 1.4 GHZ)

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SI531 数据手册

Si530/531

PRELIMINARY DATA SHEET

CRYSTAL OSCILLATOR (XO)

(10 MHZ TO 1.4 GHZ)

Features

Si5602

Available with any-rate output

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Pb-free/RoHS-compliant

Ordering Information:

Applications

See page 6.

SONET/SDH

Networking

SD/HD video

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 5.

Description

(Top View)

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

V_DD

CLK–

CLK+

GND

Si530 (LVDS/LVPECL/CML)

V_DD

Functional Block Diagram

GND

CLK+

V_DD

CLK– CLK+

Si530 (CMOS)

V_DD

Any-rate

10–1400 MHz

DSPLL®

Clock

Synthesis

Fixed

Frequency

CLK–

CLK+

GND

Si531 (LVDS/LVPECL/CML)

GND

Preliminary Rev. 0.4 5/06

Si530/531

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

12 3 4 5 6 7...10

中文翻译

下载PDF

与SI531相关器件

型号	品牌	获取价格	描述	数据表
SI5310	SILICON	获取价格	PRECISION CLOCK MULTIPLIER/REGENERATOR IC
SI53102-A1	SILICON	获取价格	PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER
SI53102-A1-GMR	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A2	SILICON	获取价格	PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER
SI53102-A2-GM	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A2-GMR	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A3	SILICON	获取价格	PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2 FAN-OUT CLOCK BUFFER
SI53102-A3-GM	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53102-A3-GMR	SILICON	获取价格	Low Skew Clock Driver, 53102 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, TDFN-8
SI53106-A01AGM	SILICON	获取价格	PLL Based Clock Driver, 53106 Series, 12 True Output(s), 0 Inverted Output(s), LEAD FREE,

与SI531相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

22
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

21
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

47
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

39

产品中心

服务支持

精选活动

关于我们

帮助中心

SI531

SI531 数据手册

与SI531相关器件

与SI531相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SI531

SI531 数据手册

与SI531相关器件

与SI531相关文章

您还可以找

您在本页遇到什么问题？