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SI4421-ICCC16 PDF预览

SI4421-ICCC16

更新时间: 2024-02-25 06:18:13
品牌 Logo 应用领域
芯科 - SILICON 电信光电二极管电信集成电路
页数 文件大小 规格书
46页 2299K
描述
Telecom Circuit, 1-Func, PDSO16, TSSOP-16

SI4421-ICCC16 技术参数

生命周期:Not Recommended零件包装代码:TSSOP
包装说明:TSSOP-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.65JESD-30 代码:R-PDSO-G16
长度:5 mm功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH认证状态:Not Qualified
座面最大高度:1.2 mm标称供电电压:3.3 V
表面贴装:YES电信集成电路类型:TELECOM CIRCUIT
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

SI4421-ICCC16 数据手册

 浏览型号SI4421-ICCC16的Datasheet PDF文件第2页浏览型号SI4421-ICCC16的Datasheet PDF文件第3页浏览型号SI4421-ICCC16的Datasheet PDF文件第4页浏览型号SI4421-ICCC16的Datasheet PDF文件第5页浏览型号SI4421-ICCC16的Datasheet PDF文件第6页浏览型号SI4421-ICCC16的Datasheet PDF文件第7页 
Si4421 Universal ISM Band  
Si4421  
FSK Transceiver  
PIN ASSIGNMENT  
DESCRIPTION  
Silicon Labs’ Si4421 is a single chip, low power, multi-channel FSK  
transceiver designed for use in applications requiring FCC or ETSI  
conformance for unlicensed use in the 433, 868 and 915 MHz bands.  
TM  
The Si4421 transceiver is a part of Silicon Labs’ EZRadio product  
line, which produces a flexible, low cost, and highly integrated solution  
that does not require production alignments. The chip is a complete  
analog RF and baseband transceiver including a multi-band PLL  
synthesizer with PA, LNA, I/Q down converter mixers, baseband filters  
and amplifiers, and an I/Q demodulator. All required RF functions are  
integrated. Only an external crystal and bypass filtering are needed for  
operation.  
This document refers to Si4421-IC rev A1.  
See www.silabs.com/integration for any applicable errata.  
See back page for ordering information.  
FEATURES  
The Si4421 features a completely integrated PLL for easy RF design,  
and its rapid settling time allows for fast frequency-hopping, bypassing  
multipath fading and interference to achieve robust wireless links. The  
PLL’s high resolution allows the usage of multiple channels in any of  
the bands. The receiver baseband bandwidth (BW) is programmable to  
accommodate various deviation, data rate and crystal tolerance  
requirements. The transceiver employs the Zero-IF approach with I/Q  
demodulation. Consequently, no external components (except crystal  
and decoupling) are needed in most applications.  
Fully integrated (low BOM, easy design-in)  
No alignment required in production  
Fast-settling, programmable, high-resolution PLL synthesizer  
Fast frequency-hopping capability  
High bit rate (up to 115.2 kbps in digital mode and 256 kbps  
in analog mode)  
Direct differential antenna input/output  
Integrated power amplifier  
Programmable TX frequency deviation (15 to 240 kHz)  
Programmable RX baseband bandwidth (67 to 400 kHz)  
Analog and digital RSSI outputs  
Automatic frequency control (AFC)  
Data quality detection (DQD)  
Internal data filtering and clock recovery  
RX synchron pattern recognition  
SPI compatible serial control interface  
Clock and reset signals for microcontroller  
16-bit RX Data FIFO  
The Si4421 dramatically reduces the load on the microcontroller with  
the integrated digital data processing features: data filtering, clock  
recovery, data pattern recognition, integrated FIFO and TX data  
register. The automatic frequency control (AFC) feature allows the use  
of a low accuracy (low cost) crystal. To minimize the system cost, the  
Si4421 can provide a clock signal for the microcontroller, avoiding the  
need for two crystals.  
For low power applications, the Si4421 supports low duty cycle  
operation based on the internal wake-up timer.  
Two 8-bit TX data registers  
Low power duty cycle mode  
Standard 10 MHz crystal reference with on-chip tuning  
Wake-up timer  
FUNCTIONAL BLOCK DIAGRAM  
2.2 to 3.8 V supply voltage  
Low power consumption  
Low standby current (0.3 A)  
Compact 16 pin TSSOP package  
MIX  
I
DCLK /  
CFIL /  
FFIT /  
AMP  
OC  
7
6
clk  
13  
12  
RF1  
RF2  
Data Filt  
CLK Rec  
I/Q  
DEMOD  
Self cal.  
OC  
FSK /  
DATA /  
nFFS  
LNA  
data  
MIX  
Q
AMP  
PA  
FIFO  
Supports very short packets (down to 3 bytes)  
Excellent temperature stability of the RF parameters  
Good adjacent channel rejection/blocking  
RSSI  
PLL & I/Q VCO  
with cal.  
COMP  
DQD  
AFC  
RF Parts  
BB Amp/Filt./Limiter  
Data processing units  
TYPICAL APPLICATIONS  
WTM  
with cal.  
CLK div  
Xosc  
LBD  
Low Power parts  
Controller  
Bias  
Home security and alarm  
Remote control, keyless entry  
Wireless keyboard/mouse and other PC peripherals  
Toy controls  
8
9
15  
1
2
5
10  
16  
3
4
11  
14  
CLK  
VDD  
XTL /  
REF  
ARSSI SDI  
SCK nSEL SDO  
nIRQ nRES nINT /  
VDI  
VSS  
Remote keyless entry  
Tire pressure monitoring  
Telemetry  
Personal/patient data logging  
Remote automatic meter reading  
1
Si4421-DS rev 2.4r 0708  
www.silabs.com  

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