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PI74SSTV16857DKEX PDF预览

PI74SSTV16857DKEX

更新时间: 2024-11-05 13:12:19
品牌 Logo 应用领域
百利通 - PERICOM /
页数 文件大小 规格书
6页 391K
描述
D Flip-Flop, SSTV Series, 1-Func, Positive Edge Triggered, 14-Bit, True Output, CMOS, PDSO48, 0.173 INCH, PLASTIC, TVSOP-48

PI74SSTV16857DKEX 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.28
Is Samacsys:N系列:SSTV
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:9.7 mm逻辑集成电路类型:D FLIP-FLOP
位数:14功能数量:1
端子数量:48最高工作温度:70 °C
最低工作温度:输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):2.8 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:4.4 mm最小 fmax:170 MHz
Base Number Matches:1

PI74SSTV16857DKEX 数据手册

 浏览型号PI74SSTV16857DKEX的Datasheet PDF文件第2页浏览型号PI74SSTV16857DKEX的Datasheet PDF文件第3页浏览型号PI74SSTV16857DKEX的Datasheet PDF文件第4页浏览型号PI74SSTV16857DKEX的Datasheet PDF文件第5页浏览型号PI74SSTV16857DKEX的Datasheet PDF文件第6页 
PI74SSTV16857  
14-Bit Registered Buffer  
Product Features  
• PI74SSTV16857isdesignedforlow-voltageoperation,  
ProductDescription  
PericomSemiconductor’sPI74SSTV16857 seriesoflogiccircuits  
are produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
V
DD  
=V  
=2.3Vto2.7V  
DDQ  
• Supports SSTL_2 Class I and II specifications  
• SSTL_2 Input and Output Levels  
• Designed for DDR Memory  
• Flow-Through Architecture  
• Package available:  
The 14-bit PI74SSTV16857 universal bus driver is designed  
for2.3Vto2.7VV operationandSSTL_2 I/OLevelsexcept for  
DD  
theRESETinputwhichisLVCMOS.  
Data flow from D to Q is controlled by the differential clock , CLK,  
CLK and RESET. Data is triggered on the positive edge of CLK.  
CLK must be used to maintain noise margins.  
–48-pin240milwideplasticTSSOP(A)  
–48-pin173milwideplasticTVSOP(K)  
LogicBlockDiagram  
RESET must be supported with LVCMOS levels as V  
may not  
REF  
bestableduringpower-up.RESETisasynchronousandisintended  
forpower-uponlyandwhenlowassuresthatalloftheregistersreset  
totheLowState,Qoutputsarelow,andallinputreceivers,dataand  
clock, are switched off.  
Pericom’s PI74SSTV16857 is characterized for operation from  
0°to70°C.  
ProductPinConfiguration  
ProductPinDescription  
Q1  
Q2  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
D1  
PinName  
RESET  
CLK  
CLK  
D
Description  
2
D2  
Reset (Active Low)  
Clock Input  
GND  
3
GND  
V
4
V
DD  
DDQ  
Q3  
Clock Input  
5
D3  
Data Input  
Q4  
Q5  
6
D4  
7
Q
Data Output  
D5  
GND  
8
D6  
GND  
Ground  
48-Pin  
A,K  
V
V
9
D7  
DDQ  
Q6  
V
Core Supply Voltage  
Output Supply Voltage  
Input Reference Voltage  
DD  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
CLK  
CLK  
V
DDQ  
REF  
Q7  
V
V
DD  
DDQ  
GND  
GND  
TruthTable(1)  
Q8  
Q9  
V
REF  
Inputs  
Outputs  
RESET  
RESET  
CLK  
CLK  
D
X
H
L
Q
L
V
D8  
DDQ  
GND  
D9  
L
H
X
X
Q10  
Q11  
Q12  
D10  
D11  
D12  
H
Η
L
Qo(2)  
V
H
L or H  
L or H  
X
V
DD  
DDQ  
GND  
GND  
D13  
D14  
Notes:  
Q13  
Q14  
1. H = HighSignalLevel  
L = LowSignalLevel  
2. Output level before the  
indicated steady state  
input conditions were  
established.  
= TransitionLOW-to-HIGH  
=TransitionHIGH-to-LOW  
X = Irrelevant  
PS8460C  
06/04/01  
1

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