Datasheet > PI74SSTV16859

PI74SSTV16859

更新时间： 2024-11-04 23:27:51

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
8页	190K
描述
Logic \| 13/26-Bit Registered Buffer

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中文翻译

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PI74SSTV16859 数据手册

PI74SSTV16859

13-Bit to 26-Bit Registered Buffer

ProductFeatures

ProductDescription

PericomSemiconductor’sPI74SSTV16859logiccircuitisproduced

using the Company’s advanced 0.35 micron CMOS technology,

achieving industry leading speed.

All inputs are compatible with the JEDEC standard for SSTL_2,

excepttheLVCMOSreset(RESET)input.AlloutputsareSSTL_2,

ClassIIcompatible.

Thedeviceoperatesfromadifferentialclock(CLKandCLK).Data

registeredatthecrossingofCLKgoingHIGH,andCLKgoingLOW.

ThePI74SSTV16859supportslow-powerstandbyoperation.When

RESET is LOW, the differential input receivers are disabled, and

undriven (floating) data, clock and reference voltage (V_REF) inputs

areallowed.Inaddition,whenRESETisLOW,allregistersarereset,

and all outputs are forced LOW. The LVCMOS RESET input must

always be held at a valid logic HIGH or LOW level.

To ensure defined outputs from the register before a stable clock

has been supplied, RESET must be held in the LOW state during

power up.

IntheDDRDIMMapplication,RESETisspecifiedtobecompletely

asynchronous with respect to CLK and CLK. Therefore, no timing

relationship can be guaranteed between the two. When entering

RESET, the register will be cleared and the outputs will be driven

LOW quickly, relative to the time to disable the differential input

receivers, thus ensuring no glitches on the output. However, when

comingoutof RESET,theregisterwillbecomeactivequickly,relative

to the time to enable the differential input receivers. When the data

inputs are LOW, and the clock is stable, during the time from the

LOW-to-HIGH transition of RESET until the input receivers

are fully enabled, the design must ensure that the outputs will

remainLOW.

• PI74SSTV16859isdesignedforlow-voltageoperation,

=2.3Vto2.7V

DDQ

• Supports SSTL_2 Class II specifications on outputs

• All InputsareSSTL_2Compatible,exceptRESET

whichisLVCMOS.

• Designed for DDR Memory

• Flow-Through Architecture

• Packages (Lead-free packages are available):

–64-pin,240-milwideplasticTSSOP(A)

– 56-contact, Plastic Very Thin Fine Pitch Quad Flat No

LeadQFN(ZB)

Logic Block Diagram - TSSOP

CLK

Q1A

RESET

CLK

Q1B

REF

TO 12 OTHER CHANNELS

Logic Block Diagram - QFN

CLK

Q1A

Q1B

RESET

CLK

Pericom’s PI74SSTV16859 is characterized for operation from

0°Cto70°C.

REF

TruthTable⁽¹⁾

TO 12 OTHER CHANNELS

Inputs

Outputs

ProductPinDescription

RESET

CLK

X or

CLK

X or

Pin Name

RESET

CLK

Description

X or

Floating

Reset (Active Low) LVCMOS

Clock Input, Positive Differential Input

Clock Input, Negative Differential Input

Data Input, D1-D13

Floating

↑

↓

Qo⁽²⁾

↑

↓

L or H

Data Output, Q1-Q13

Notes:

GND

V_DD

V_DDQ

V_REF

Ground

↑

↓

= HighSignalLevel

= LowSignalLevel

2. Output level before the

indicated steady state

input conditions were

established.

Core Supply Voltage, 2.5V Nominal

Output Supply Voltage, 2.5V Nominal

Input Reference Voltage, 1.25V Nominal

= Transition LOW-to-HIGH

= Transition HIGH-to-LOW

= Irrelevant or floating

PS8508D

05/01/03

12 3 4 5 6 7 8

中文翻译

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与PI74SSTV16859相关器件

型号	品牌	获取价格	描述	数据表
PI74SSTV16859A	ETC	获取价格	Memory Driver
PI74SSTV16859AE	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, 13-Bit, True Output, CMOS, PDSO64, 0.240 INCH, LEAD FREE
PI74SSTV16859AEX	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, 13-Bit, True Output, CMOS, PDSO64, 0.240 INCH, PLASTIC,
PI74SSTV16859AX	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, Positive Edge Triggered, 13-Bit, True Output, CMOS, PDSO
PI74SSTV16859FAE	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, Positive Edge Triggered, 13-Bit, True Output, CMOS, PDSO
PI74SSTV16859FZBE	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, Positive Edge Triggered, 13-Bit, True Output, CMOS, PQCC
PI74SSTV16859ZB	ETC	获取价格	Memory Driver
PI74SSTV32852	ETC	获取价格	Logic \| 24/48-Bit Registered Buffer - LFBGA Package
PI74SSTV32852FNB	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, 24-Bit, True Output, CMOS, PBGA114, LFBGA-114
PI74SSTV32852FNBE	PERICOM	获取价格	D Flip-Flop, SSTV Series, 1-Func, 24-Bit, True Output, CMOS, PBGA114, LFBGA-114

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