NDP603AL_NL

更新时间： 2024-09-20 13:11:59

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NDP603AL_NL 数据手册

January 1996

NDP603AL / NDB603AL

N-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description

Features

These N-Channel logic level enhancement mode power

field effect transistors are produced using Fairchild's

proprietary, high cell density, DMOS technology. This

very high density process is especially tailored to

25A, 30V. R_DS(ON)= 0.022W @ V_GS=10V.

Critical DC electrical parameters specified at elevated

temperature.

minimize on-state resistance.

These devices are

Rugged internal source-drain diode can eliminate the need

for an external Zener diode transient suppressor.

particularly suited for low voltage applications such as

DC/DC converters and high efficiency switching circuits

where fast switching, low in-line power loss, and

resistance to transients are needed.

High density cell design for extremely low R_DS(ON)

175°C maximum junction temperature rating.

______________________________________________________________________________

Absolute Maximum Ratings

Symbol Parameter

T_C= 25°C unless otherwise noted

NDP603AL

NDB603AL

Units

Drain-Source Voltage

Gate-Source Voltage - Continuous

Drain Current - Continuous

- Pulsed

± 20

V_DSS

V_GSS

I_D

25 (Note 1)

100

P_D

Total Power Dissipation @ T_C= 25°C

Derate above 25°C

W/°C

°C

0.4

Operating and Storage Temperature Range

-65 to 175

275

T_J,T_STG

T_L

Maximum lead temperature for soldering purposes,

1/8" from case for 5 seconds

°C

THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient

2.5

°C/W

62.5

NDP603AL.SAM

12 3 4 5

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NDP603AL_NL 替代型号

型号	品牌	替代类型	描述	数据表
NDP603AL	FAIRCHILD	功能相似	N-Channel Logic Level Enhancement Mode Field Effect Transistor

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