NB3N3001DTR2G

更新时间： 2024-11-23 02:59:47

品牌	Logo	应用领域
安森美 - ONSEMI		时钟发生器
页数	文件大小	规格书
8页	115K
描述
3.3 V 106.25 MHz/ 212.5 MHz PureEdge Clock Generator with LVPECL Differential Output

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NB3N3001DTR2G 数据手册

NB3N3001

3.3 V 106.25 MHz/ 212.5 MHz

PureEdge Clock Generator with

LVPECL Differential Output

Description

The NB3N3001 is a low−jitter, dual−rate PLL−synthesized clock

generator. It accepts a standard 26.5625 MHz fundamental mode AT cut

parallel resonant crystal as the reference source for its integrated crystal

oscillator and low noise phase−locked loop (PLL) and produces user

selectable clock frequencies of either 106.25 MHz or 212.5 MHz.

In addition, the PLL circuitry will generate a 50% duty cycle

square−wave through a pair of differential LVPECL clock outputs.

Typical phase jitter at 106.25 MHz is 0.3 ps RMS from 637 kHz to

10 MHz.

The LVPECL output drivers can be disabled to high impedance with

the OE pin set LOW. The NB3N3001 operates from a single +3.3 V

supply, and is available in both plastic package and die form. The

operating temperature range is from −40°C to +85°C.

The NB3N3001 device provides the optimum combination of low

cost, flexibility, and high performance which makes it ideal for

Fibre−Channel applications.

http://onsemi.com

MARKING

DIAGRAM

301

YWW

TSSOP−8

DT SUFFIX

CASE 948S

= Assembly Location

= Year

WW = Work Week

= Pb−Free Package

Features

• PureEdge Clock Family Provides Accuracy and Precision

• Selectable Output Frequency of 106.25 MHz or 212.5 MHz

• Crystal Oscillator Interface Designed for a 26.5625 MHz Crystal

• Fully Integrated Phase−Lock−Loop with Internal Loop Filter

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

• Differential 3.3 V LVPECL Outputs

• Exceeds Bellcore and ITU Jitter Generation Specification

• RMS Phase Jitter @ 106.25 MHz, using a 26.5625 MHz Crystal

(637 kHz − 10 MHz): 0.3 ps (Typical)

• RMS Phase Noise at 106.25 MHz

Phase Noise:

Offset Noise Power

100 Hz −108 dBc/Hz

1 kHz −122 dBc/Hz

10 kHz −135 dBc/Hz

100 kHz −135 dBc/Hz

• Operating Range: V = 3.135 V to 3.465 V

• −40°C to +85°C Ambient Operating Temperature

• Small Footprint 8−pin TSSOP Package

• This is a Pb−Free Device

FSEL

212.5 MHz

Crystal

Oscillator

Phase

Detector

Charge

Pump

VCO

850 MHz

LVPECL

Output

N =B8

orB4

26.5625 MHz

106.25 MHz

OUT

M = B32

Figure 1. Logic Diagram

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

October, 2006 − Rev. 1

NB3N3001/D

12 3 4 5 6 7 8

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NB3N3001DTR2G 替代型号

型号	品牌	替代类型	描述	数据表
NB3N3001DTG	ONSEMI	完全替代	3.3 V 106.25 MHz/ 212.5 MHz PureEdge Clock Generator with LVPECL Differential Output

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