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NB3N3010BMNR4G

更新时间： 2024-11-23 19:45:07
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 151K
描述
IC 3N SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, 2 X 2 MM, 0.50 MM PITCH, LEAD FREE, DFN-8, Clock Driver

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NB3N3010BMNR4G 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：DFN包装说明：HVSON,
针数：8Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.77
系列：3N输入调节：STANDARD
JESD-30 代码：S-PDSO-N8长度：2 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER功能数量：1
反相输出次数：端子数量：8
实输出次数：2最高工作温度：85 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：HVSON封装形状：SQUARE
封装形式：SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILESame Edge Skew-Max（tskwd）：0.7 ns
座面最大高度：1 mm最大供电电压 (Vsup)：3.465 V
最小供电电压 (Vsup)：3.135 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES温度等级：OTHER
端子形式：NO LEAD端子节距：0.5 mm
端子位置：DUAL宽度：2 mm
最小 fmax：12.3187 MHzBase Number Matches：1

NB3N3010BMNR4G 数据手册

 浏览型号NB3N3010BMNR4G的Datasheet PDF文件第2页浏览型号NB3N3010BMNR4G的Datasheet PDF文件第3页浏览型号NB3N3010BMNR4G的Datasheet PDF文件第4页浏览型号NB3N3010BMNR4G的Datasheet PDF文件第5页浏览型号NB3N3010BMNR4G的Datasheet PDF文件第6页浏览型号NB3N3010BMNR4G的Datasheet PDF文件第7页 
NB3N3010B  
3.3V, 12.288 MHz Audio  
Oversampling Clock  
Generator for USB  
Applications  
http://onsemi.com  
MARKING  
Description  
The NB3N3010B is a precision, low noise clock multiplier that  
generates an output frequency of 12.288 MHz. This is accomplished  
by using Frequency−Locked−Loop (FLL) techniques where a 4 kHz  
reference input is multiplied by 3072, or an 8 kHz input by 1536. The  
frequency multiplier is selected by the S0 pin.  
The two LVCMOS output drivers are disabled to a logic Low with  
the ENABLEn pin set HIGH. The NB3N3010B operates from a single  
+3.3 V supply, and is available in the SOIC−8 pin package, and  
optionally in a DFN8 package. The operating temperature range is  
from 0°C to +85°C.  
DIAGRAMS*  
8
8
1
3010B  
ALYW  
G
SOIC−8  
D SUFFIX  
CASE 751  
1
The NB3N3010B device provides the optimum combination of low  
cost, flexibility, and high performance. This makes it ideal for  
applications such as oversampling A−to−D and D−to−A converters  
from a low reference frequency, such as a USB start−of−frame (SOF)  
pulse.  
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
Features  
A
L
Y
= Assembly Location  
= Wafer Lot  
= Year  
• Accepts 8 kHz or 4 kHz Reference Input Derived from USB  
Start−of−Frame  
W = Work Week  
M = Date Code  
• Generates 12.288 MHz Frequency−Locked to the Reference  
• Fully Integrated Frequency−Lock−Loop with Internal Loop Filter  
• Low Skew Dual LVCMOS Outputs  
• Very Low Phase Noise Preserves Codec Noise Floor  
• Internal Voltage Regulator  
• Supply Voltage Required: +3.3 V $5%  
• Temperature Range: 0°C to +85°C  
• These are Pb−Free Devices  
G
= Pb−Free Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
VDD  
8
CFILT  
5
GND  
4
CLK_A  
6
+1.8 V  
Linear  
Regulator  
REF  
CLK_B  
Output  
Buffers  
Tolerant  
Frequency  
Detector  
3
Frequency  
Generator  
Loop Filter  
7
Divider  
1
2
ENABLEn  
S0  
Figure 1. NB3N3010B Simplified Diagram  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
May, 2011 − Rev. 0  
NB3N3010B/D  
 
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