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MMUN2234LT3 PDF预览

MMUN2234LT3

更新时间: 2024-11-02 03:48:55
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
12页 100K
描述
Bias Resistor Transistor

MMUN2234LT3 数据手册

 浏览型号MMUN2234LT3的Datasheet PDF文件第2页浏览型号MMUN2234LT3的Datasheet PDF文件第3页浏览型号MMUN2234LT3的Datasheet PDF文件第4页浏览型号MMUN2234LT3的Datasheet PDF文件第5页浏览型号MMUN2234LT3的Datasheet PDF文件第6页浏览型号MMUN2234LT3的Datasheet PDF文件第7页 
MMUN2211LT1 Series  
Preferred Devices  
Bias Resistor Transistor  
NPN Silicon Surface Mount Transistor  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base-emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the  
SOT-23 package which is designed for low power surface mount  
applications.  
http://onsemi.com  
PIN 3  
COLLECTOR  
(OUTPUT)  
R1  
R2  
PIN 1  
BASE  
(INPUT)  
PIN 2  
EMITTER  
(GROUND)  
Features  
Simplifies Circuit Design  
Reduces Board Space and Component Count  
Pb−Free Packages are Available  
MARKING DIAGRAM  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
A8x M G  
SOT−23  
CASE 318  
STYLE 6  
G
Rating  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
1
V
CBO  
CEO  
V
50  
Vdc  
A8x = Specific Device Code  
I
C
100  
mAdc  
M
= Date Code  
G
= Pb−Free Package  
(Note: Microdot may be in either location)  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
Total Device Dissipation  
P
246 (Note 1)  
400 (Note 2)  
1.5 (Note 1)  
2.0 (Note 2)  
mW  
D
T = 25°C  
A
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 11 of this data sheet.  
Derate above 25°C  
°C/W  
°C/W  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Lead  
R
508 (Note 1)  
311 (Note 2)  
q
JA  
Preferred devices are recommended choices for future use  
and best overall value.  
R
174 (Note 1)  
208 (Note 2)  
°C/W  
°C  
q
JL  
Junction and Storage Temperature  
Range  
T , T  
J
55 to +150  
stg  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
1. FR−4 @ minimum pad  
2. FR−4 @ 1.0 x 1.0 inch pad  
© Semiconductor Components Industries, LLC, 2005  
Publication Order Number:  
August, 2005 − Rev. 7  
MMUN2211LT1/D  
 

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