Datasheet > MC14069UB_06

MC14069UB_06

更新时间： 2024-09-09 04:59:31

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
7页	145K
描述
Hex Inverter

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MC14069UB_06 数据手册

MC14069UB

Hex Inverter

The MC14069UB hex inverter is constructed with MOS P−channel

and N−channel enhancement mode devices in a single monolithic

structure. These inverters find primary use where low power

dissipation and/or high noise immunity is desired. Each of the six

inverters is a single stage to minimize propagation delays.

http://onsemi.com

Features

MARKING

DIAGRAMS

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low−Power TTL Loads or One Low−Power

Schottky TTL Load Over the Rated Temperature Range

• Triple Diode Protection on All Inputs

PDIP−14

P SUFFIX

CASE 646

MC14069UBCP

AWLYYWWG

• Pin−for−Pin Replacement for CD4069UB

• Meets JEDEC UB Specifications

• Pb−Free Packages are Available

SOIC−14

D SUFFIX

CASE 751A

14069UG

AWLYWW

MAXIMUM RATINGS (Voltages Referenced to V

)

Symbol

Parameter

Value

−0.5 to +18.0

Unit

DC Supply Voltage Range

069U

ALYWG

V , V

Input or Output Voltage Range

(DC or Transient)

−0.5 to V + 0.5

in out

TSSOP−14

DT SUFFIX

CASE 948G

I , I

in out

Input or Output Current

(DC or Transient) per Pin

±10

Power Dissipation, per Package

(Note 1)

500

Ambient Temperature Range

Storage Temperature Range

−55 to +125

−65 to +150

260

°C

SOEIAJ−14

F SUFFIX

CASE 965

MC14069UB

ALYWG

stg

Lead Temperature

(8−Second Soldering)

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

This device contains protection circuitry to guard against damage due to high

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

WL, L

YY, Y

= Assembly Location

= Wafer Lot

= Year

WW, W = Work Week

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

high−impedance circuit. For proper operation, V and V should be constrained

out

to the range V v (V or V ) v V

out

Unused inputs must always be tied to an appropriate logic voltage level

(e.g., either V or V ). Unused outputs must be left open.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

October, 2006 − Rev. 8

MC14069UB/D

12 3 4 5 6 7

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与MC14069UB_06相关器件

型号	品牌	获取价格	描述	数据表
MC14069UB_11	ONSEMI	获取价格	Hex Inverter
MC14069UBALD	MOTOROLA	获取价格	4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP14, 632-08
MC14069UBALDS	MOTOROLA	获取价格	4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP14, 632-08
MC14069UBALS	MOTOROLA	获取价格	IC,LOGIC GATE,HEX INVERTER,CMOS,DIP,14PIN,CERAMIC
MC14069UBBCBS	MOTOROLA	获取价格	Inverter, CMOS, CDIP14
MC14069UBCL	MOTOROLA	获取价格	Hex Inverter
MC14069UBCLD	MOTOROLA	获取价格	4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP14, 632-08
MC14069UBCLDS	MOTOROLA	获取价格	暂无描述
MC14069UBCP	ONSEMI	获取价格	Hex Inverter
MC14069UBCP	MOTOROLA	获取价格	Hex Inverter

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