MC10EP016, MC100EP016
3.3V / 5VĄECL 8-Bit
Synchronous Binary
Up Counter
The MC10/100EP016 is a high–speed synchronous, presettable,
cascadeable 8–bit binary counter. Architecture and operation are the
same as the MC10E016 in the ECLinPS family.
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MARKING
The counter features internal feedback to TC gated by the TCLD
(Terminal Count Load) pin. When TCLD is LOW (or left open, in
which case it is pulled LOW by the internal pulldowns), the TC
feedback is disabled, and counting proceeds continuously, with TC
going LOW to indicate an all–one state. When TCLD is HIGH, the TC
feedback causes the counter to automatically reload upon TC = LOW,
thus functioning as a programmable counter. The Qn outputs do not
need to be terminated for the count function to operate properly. To
minimize noise and power, unused Q outputs should be left
unterminated.
COUT and COUT provide differential outputs from a single,
non–cascaded counter or divider application. COUT and COUT
should not be used in cascade configuration. Only TC should be used
for a counter or divider cascade chain output.
A differential clock input has also been added to improve
performance.
DIAGRAM*
MCxxx
EP016
AWLYYWW
LQFP–32
FA SUFFIX
CASE 873A
32
1
xxx = 10 OR 100
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
The 100 Series contains temperature compensation.
*For additional information, see Application Note
AND8002/D
• 500 ps Typical Propagation Delay
• PECL Mode Operating Range: V = 3.0 V to 5.5 V
CC
with V = 0 V
EE
• NECL Mode Operating Range: V = 0 V
CC
with V = –3.0 V to –5.5 V
EE
ORDERING INFORMATION
• Open Input Default State
• Safety Clamp on Inputs
• Internal TC Feedback (Gated)
• Addition of COUT and COUT
• 8–Bit
Device
Package
Shipping
MC10EP016FA
LQFP–32 250 Units/Tray
LQFP–32 2000 Tape & Reel
LQFP–32 250 Units/Tray
MC10EP016FAR2
MC100EP016FA
MC100EP016FAR2 LQFP–32 2000 Tape & Reel
• Differential Clock Input
• V Output
BB
• Fully Synchronous Counting and TC Generation
• Asynchronous Master Reset
Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
September, 2002 – Rev. 10
MC10EP016/D