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MC10EP05DTR2G PDF预览

MC10EP05DTR2G

更新时间: 2024-10-01 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
11页 108K
描述
3.3V / 5V ECL 2−Input Differential AND/NAND

MC10EP05DTR2G 数据手册

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MC10EP05, MC100EP05  
3.3V / 5VꢀECL 2−Input  
Differential AND/NAND  
Description  
The MC10/100EP05 is a 2−input differential AND/NAND gate.  
The device is functionally equivalent to the EL05 and LVEL05  
devices. With AC performance much faster than the LVEL05 device,  
the EP05 is ideal for applications requiring the fastest  
AC performance available.  
http://onsemi.com  
MARKING DIAGRAMS*  
The 100 Series contains temperature compensation.  
8
8
8
HEP05  
ALYWG  
G
KEP05  
ALYWG  
G
Features  
1
220 ps Typical Propagation Delay  
Maximum Frequency > 3 GHz Typical  
SOIC−8  
D SUFFIX  
CASE 751  
1
1
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
8
8
1
8
with V = −3.0 V to −5.5 V  
EE  
1
HP05  
KP05  
Open Input Default State  
Safety Clamp on Inputs  
Q Output Will Default LOW with Inputs Open or at V  
Pb−Free Packages are Available  
ALYWG  
ALYWG  
TSSOP−8  
DT SUFFIX  
CASE 948R  
G
G
1
EE  
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
5I  
= MC10  
= MC100  
= MC10  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
2X = MC100  
= Date Code  
D
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 8  
MC10EP05/D  

MC10EP05DTR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP05MNR4G ONSEMI

完全替代

3.3V / 5V ECL 2−Input Differential AND/NAND
MC100EP05DTG ONSEMI

完全替代

3.3V / 5V ECL 2−Input Differential AND/NAND
MC10EP05DTG ONSEMI

完全替代

3.3V / 5V ECL 2−Input Differential AND/NAND

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