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MC100EP05DTG PDF预览

MC100EP05DTG

更新时间: 2024-11-06 05:22:27
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
11页 108K
描述
3.3V / 5V ECL 2−Input Differential AND/NAND

MC100EP05DTG 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:1.75
其他特性:NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V系列:100E
JESD-30 代码:S-PDSO-G8JESD-609代码:e3
长度:3 mm逻辑集成电路类型:AND/NAND GATE
湿度敏感等级:3功能数量:1
输入次数:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:RAIL
峰值回流温度(摄氏度):260电源:-4.5 V
最大电源电流(ICC):38 mAProp。Delay @ Nom-Sup:0.32 ns
传播延迟(tpd):0.27 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3 mmBase Number Matches:1

MC100EP05DTG 数据手册

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MC10EP05, MC100EP05  
3.3V / 5VꢀECL 2−Input  
Differential AND/NAND  
Description  
The MC10/100EP05 is a 2−input differential AND/NAND gate.  
The device is functionally equivalent to the EL05 and LVEL05  
devices. With AC performance much faster than the LVEL05 device,  
the EP05 is ideal for applications requiring the fastest  
AC performance available.  
http://onsemi.com  
MARKING DIAGRAMS*  
The 100 Series contains temperature compensation.  
8
8
8
HEP05  
ALYWG  
G
KEP05  
ALYWG  
G
Features  
1
220 ps Typical Propagation Delay  
Maximum Frequency > 3 GHz Typical  
SOIC−8  
D SUFFIX  
CASE 751  
1
1
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
8
8
1
8
with V = −3.0 V to −5.5 V  
EE  
1
HP05  
KP05  
Open Input Default State  
Safety Clamp on Inputs  
Q Output Will Default LOW with Inputs Open or at V  
Pb−Free Packages are Available  
ALYWG  
ALYWG  
TSSOP−8  
DT SUFFIX  
CASE 948R  
G
G
1
EE  
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
5I  
= MC10  
= MC100  
= MC10  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
2X = MC100  
= Date Code  
D
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 8  
MC10EP05/D  

MC100EP05DTG 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP05MNR4G ONSEMI

完全替代

3.3V / 5V ECL 2−Input Differential AND/NAND
MC10EP05DTR2G ONSEMI

完全替代

3.3V / 5V ECL 2−Input Differential AND/NAND
MC10EP05DTG ONSEMI

类似代替

3.3V / 5V ECL 2−Input Differential AND/NAND

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