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MC10EP016FAR2 PDF预览

MC10EP016FAR2

更新时间: 2024-11-04 22:20:27
品牌 Logo 应用领域
安森美 - ONSEMI 计数器逻辑集成电路
页数 文件大小 规格书
12页 114K
描述
3.3V / 5VECL 8-Bit Synchronous Binary Up Counter

MC10EP016FAR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:LQFP-32
针数:32Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:7.62
Is Samacsys:N其他特性:NECL MODE: 0V VCC WITH VEE = -3.0V TO -5.5V
计数方向:UP系列:10E
JESD-30 代码:S-PQFP-G32JESD-609代码:e0
长度:7 mm负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:1000000000 Hz
工作模式:SYNCHRONOUS位数:8
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:OPEN-EMITTER封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:-5.2 V最大电源电流(ICC):200 mA
传播延迟(tpd):0.65 ns认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Counters
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn80Pb20)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30触发器类型:POSITIVE EDGE
宽度:7 mm最小 fmax:1300 MHz
Base Number Matches:1

MC10EP016FAR2 数据手册

 浏览型号MC10EP016FAR2的Datasheet PDF文件第2页浏览型号MC10EP016FAR2的Datasheet PDF文件第3页浏览型号MC10EP016FAR2的Datasheet PDF文件第4页浏览型号MC10EP016FAR2的Datasheet PDF文件第5页浏览型号MC10EP016FAR2的Datasheet PDF文件第6页浏览型号MC10EP016FAR2的Datasheet PDF文件第7页 
MC10EP016, MC100EP016  
3.3V / 5VĄECL 8-Bit  
Synchronous Binary  
Up Counter  
The MC10/100EP016 is a high–speed synchronous, presettable,  
cascadeable 8–bit binary counter. Architecture and operation are the  
same as the MC10E016 in the ECLinPS family.  
http://onsemi.com  
MARKING  
The counter features internal feedback to TC gated by the TCLD  
(Terminal Count Load) pin. When TCLD is LOW (or left open, in  
which case it is pulled LOW by the internal pulldowns), the TC  
feedback is disabled, and counting proceeds continuously, with TC  
going LOW to indicate an all–one state. When TCLD is HIGH, the TC  
feedback causes the counter to automatically reload upon TC = LOW,  
thus functioning as a programmable counter. The Qn outputs do not  
need to be terminated for the count function to operate properly. To  
minimize noise and power, unused Q outputs should be left  
unterminated.  
COUT and COUT provide differential outputs from a single,  
non–cascaded counter or divider application. COUT and COUT  
should not be used in cascade configuration. Only TC should be used  
for a counter or divider cascade chain output.  
A differential clock input has also been added to improve  
performance.  
DIAGRAM*  
MCxxx  
EP016  
AWLYYWW  
LQFP–32  
FA SUFFIX  
CASE 873A  
32  
1
xxx = 10 OR 100  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
The 100 Series contains temperature compensation.  
*For additional information, see Application Note  
AND8002/D  
500 ps Typical Propagation Delay  
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
with V = –3.0 V to –5.5 V  
EE  
ORDERING INFORMATION  
Open Input Default State  
Safety Clamp on Inputs  
Internal TC Feedback (Gated)  
Addition of COUT and COUT  
8–Bit  
Device  
Package  
Shipping  
MC10EP016FA  
LQFP–32 250 Units/Tray  
LQFP–32 2000 Tape & Reel  
LQFP–32 250 Units/Tray  
MC10EP016FAR2  
MC100EP016FA  
MC100EP016FAR2 LQFP–32 2000 Tape & Reel  
Differential Clock Input  
V Output  
BB  
Fully Synchronous Counting and TC Generation  
Asynchronous Master Reset  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
September, 2002 – Rev. 10  
MC10EP016/D  

MC10EP016FAR2 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP016AFAR2G ONSEMI

类似代替

3.3 V ECL 8−Bit Synchronous Binary Up Counter
MC10EP016FAR2G ONSEMI

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3.3V / 5V ECL 8−Bit Synchronous Binary Up Counter
MC100EP016FA ONSEMI

类似代替

3.3V / 5VECL 8-Bit Synchronous Binary Up Counter

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