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MC10EP016MNG PDF预览

MC10EP016MNG

更新时间: 2024-11-06 01:15:59
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
15页 195K
描述
ECL 8-Bit Synchronous Binary Up Counter

MC10EP016MNG 数据手册

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MC10EP016, MC100EP016  
3.3V / 5VꢀECL 8-Bit  
Synchronous Binary Up  
Counter  
Description  
http://onsemi.com  
MARKING  
DIAGRAMS*  
The MC10/100EP016 is a high-speed synchronous, presettable,  
cascadeable 8-bit binary counter. Architecture and operation are the  
same as the MC10E016 in the ECLinPSfamily.  
The counter features internal feedback to TC gated by the TCLD  
(Terminal Count Load) pin. When TCLD is LOW (or left open, in  
which case it is pulled LOW by the internal pulldowns), the TC  
feedback is disabled, and counting proceeds continuously, with TC  
going LOW to indicate an all-one state. When TCLD is HIGH, the TC  
feedback causes the counter to automatically reload upon TC = LOW,  
thus functioning as a programmable counter. The Qn outputs do not  
need to be terminated for the count function to operate properly. To  
minimize noise and power, unused Q outputs should be left  
unterminated.  
MCxxx  
EP016  
AWLYYWWG  
LQFP-32  
FA SUFFIX  
CASE 873A  
COUT and COUT provide differential outputs from a single,  
non-cascaded counter or divider application. COUT and COUT  
should not be used in cascade configuration. Only TC should be used  
for a counter or divider cascade chain output.  
A differential clock input has also been added to improve  
performance.  
The 100 Series contains temperature compensation.  
1
MCxxx  
EP016  
32  
1
AWLYYWWG  
G
QFN32  
MN SUFFIX  
CASE 488AM  
Features  
ꢀ500 ps Typical Propagation Delay  
xxx  
A
= 10 or 100  
ꢀPECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
= Assembly Location  
= Wafer Lot  
= Year  
with V = 0 V  
EE  
WL  
YY  
WW  
ꢀNECL Mode Operating Range: V = 0 V  
CC  
= Work Week  
with V = -3.0 V to -5.5 V  
EE  
G or G = Pb-Free Package  
ꢀOpen Input Default State  
ꢀSafety Clamp on Inputs  
ꢀInternal TC Feedback (Gated)  
ꢀAddition of COUT and COUT  
ꢀ8-Bit  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ꢀDifferential Clock Input  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 13 of this data sheet.  
ꢀV Output  
BB  
ꢀFully Synchronous Counting and TC Generation  
ꢀAsynchronous Master Reset  
ꢀPb-Free Packages are Available*  
*For additional information on our Pb-Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©ꢀ Semiconductor Components Industries, LLC, 2007  
August, 2007 - Rev. 12  
1
Publication Order Number:  
MC10EP016/D  

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