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MC10EP05 PDF预览

MC10EP05

更新时间: 2024-11-23 22:58:07
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 89K
描述
2-Input Differential AND/NAND

MC10EP05 数据手册

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The MC10EP05 is a 2–input differential AND/NAND gate. The  
device is functionally equivalent to the EL05 and LVEL05 devices.  
With AC performance much faster than the LVEL05 device, the EP05  
is ideal for applications requiring the fastest AC performance  
available.  
http://onsemi.com  
170ps Typical Propagation Delay  
High Bandwidth to 3 Ghz Typical  
ECL mode: 0V V  
PECL mode: 3.0V to 5.5V V  
CC  
with V = –3.0V to –5.5V  
CC  
EE  
8
with V = 0V  
EE  
Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D  
1
Q Output will default LOW with inputs open or at V  
ESD Protection: >4KV HBM, >200V MM  
New Differential Input Common Mode Range  
EE  
SO–8  
D SUFFIX  
CASE 751  
Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.  
For Additional Information, See Application Note AND8003/D  
Flammability Rating: UL–94 code V–0 @ 1/8”,  
Oxygen Index 28 to 34  
MARKING DIAGRAM  
8
1
A = Assembly Location  
HEP05  
ALYW  
L = Wafer Lot  
Y = Year  
Transistor Count = 137 devices  
W = Work Week  
*For additional information, see Application Note  
AND8002/D  
D
1
2
8
7
V
CC  
0
PIN DESCRIPTION  
PIN  
D0, D1, D0, D1  
Q, Q  
FUNCTION  
D
0
Q
Q
ECL Data Inputs  
ECL Data Outputs  
D
3
4
6
5
1
1
TRUTH TABLE  
D0  
D1  
D0  
D1  
Q
Q
D
V
EE  
L
L
H
H
L
H
L
H
H
L
H
L
H
L
L
L
L
H
H
H
H
L
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram  
H
L
ORDERING INFORMATION  
Device  
Package  
Shipping  
98 Units/Rail  
2500 Tape & Reel  
MC10EP05D  
SOIC  
MC10EP05DR2  
SOIC  
Semiconductor Components Industries, LLC, 1999  
1
Publication Order Number:  
September, 1999 – Rev. 1.0  
MC10EP05/D  

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