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MC10EP01MNR4 PDF预览

MC10EP01MNR4

更新时间: 2024-11-06 04:59:39
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 156K
描述
3.3V / 5V ECL 4−Input OR/NOR

MC10EP01MNR4 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:DFN
包装说明:HVSSON, SOLCC8,.08,20针数:8
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.54Is Samacsys:N
其他特性:NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V系列:10E
JESD-30 代码:S-PDSO-N8JESD-609代码:e0
长度:2 mm逻辑集成电路类型:OR/NOR GATE
功能数量:1输入次数:4
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVSSON封装等效代码:SOLCC8,.08,20
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:-5.2 V最大电源电流(ICC):31 mA
Prop。Delay @ Nom-Sup:0.35 ns传播延迟(tpd):0.33 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:2 mm
Base Number Matches:1

MC10EP01MNR4 数据手册

 浏览型号MC10EP01MNR4的Datasheet PDF文件第2页浏览型号MC10EP01MNR4的Datasheet PDF文件第3页浏览型号MC10EP01MNR4的Datasheet PDF文件第4页浏览型号MC10EP01MNR4的Datasheet PDF文件第5页浏览型号MC10EP01MNR4的Datasheet PDF文件第6页浏览型号MC10EP01MNR4的Datasheet PDF文件第7页 
MC10EP01, MC100EP01  
3.3V / 5VꢀECL 4−Input  
OR/NOR  
Description  
The MC10EP01 is a 4input OR/NOR gate. The device is  
functionally equivalent to the EL01 device, LVEL01, and E101 (a  
quad version). With AC performance much faster than the LVEL01  
device, the EP01 is ideal for applications requiring the fastest AC  
performance available.  
http://onsemi.com  
MARKING DIAGRAMS*  
The 100 Series contains temperature compensation.  
8
8
8
HEP01  
ALYW  
G
KEP01  
ALYW  
G
Features  
1
230 ps Typical Propagation Delay  
Maximum Frequency > 3 GHz Typical  
PECL Mode Operating Range:  
SOIC8  
D SUFFIX  
CASE 751  
1
1
V
CC  
= 3.0 V to 5.5 V with V = 0 V  
EE  
NECL Mode Operating Range:  
= 0 V with V = 3.0 V to 5.5 V  
Open Input Default State  
8
8
1
8
V
CC  
EE  
1
HP01  
KP01  
ALYWG  
ALYWG  
TSSOP8  
DT SUFFIX  
CASE 948R  
PbFree Packages are Available  
G
G
1
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
A
L
= Assembly Location  
= Wafer Lot  
5H = MC10  
2W = MC100  
Y
W
G
= Year  
= Work Week  
= PbFree Package  
M
= Date Code  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 8  
MC10EP01/D  

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