Datasheet > M69AR048AL80ZB8

M69AR048AL80ZB8

更新时间： 2024-02-25 17:34:12

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		静态存储器
页数	文件大小	规格书
25页	159K
描述
2MX16 STANDARD SRAM, 80ns, PBGA48, 6 X 8 MM, 0.75 MM PITCH, TFBGA-48

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技术参数
数据手册

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M69AR048AL80ZB8 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	TFBGA, BGA48,6X8,30	针数：	48
Reach Compliance Code：	compliant	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.8
Base Number Matches：	1

M69AR048AL80ZB8 数据手册

M69AR048A

SUMMARY DESCRIPTION

The M69AR048A is a 32 Mbit (33,554,432 bit)

CMOS memory, organized as 2,097,152 words by

16 bits, and is supplied by a single 1.65V to 1.95V

supply voltage range.

no external clocks or timing strobes, and has a

standard Asynchronous SRAM Interface.

The internal control logic of the M69AR048A han-

dles the periodic refresh cycle, automatically, and

without user involvement.

Write cycles can be performed on a single byte by

using Upper Byte Enable (UB) and Lower Byte En-

able (LB).

The device can be put into standby mode using

Chip Enable (E1).

M69AR048A is a member of STMicroelectronics

1T/1C (one transistor per cell) memory family.

These devices are manufactured using dynamic

random access memory cells, to minimize the cell

size, and maximize the amount of memory that

can be implemented in a given area.

However, through the use of internal control logic,

the device is fully static in its operation, requiring

Figure 2. Logic Diagram

Table 1. Signal Names

A0-A20

Address Input

Data Input/Output

Chip Enable

DQ0-DQ15

Output Enable

Write Enable

A0-A20

DQ0-DQ15

Upper Byte Enable

Lower Byte Enable

Supply Voltage

Ground

M69AR048A

Not Connected

(no internal connection)

AI08586

4/25

1 2 345 6 7...25

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