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IS65WV1288DALL/DBLL PDF预览

IS65WV1288DALL/DBLL

更新时间: 2024-12-01 12:23:03
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
16页 468K
描述
128K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS65WV1288DALL/DBLL 数据手册

 浏览型号IS65WV1288DALL/DBLL的Datasheet PDF文件第2页浏览型号IS65WV1288DALL/DBLL的Datasheet PDF文件第3页浏览型号IS65WV1288DALL/DBLL的Datasheet PDF文件第4页浏览型号IS65WV1288DALL/DBLL的Datasheet PDF文件第5页浏览型号IS65WV1288DALL/DBLL的Datasheet PDF文件第6页浏览型号IS65WV1288DALL/DBLL的Datasheet PDF文件第7页 
performanceCMOStechnology.Thishighlyreliableprocessꢀ  
                                                                            
IS62WV1288DALL/DBLL  
IS65WV1288DALL/DBLL  
128Kꢀxꢀ8ꢀLOWꢀVOLTAGE,ꢀ  
DECEMBERꢀ2010  
ULTRAꢀLOWꢀPOWERꢀCMOSꢀSTATICꢀRAM  
FEATURES  
DESCRIPTION  
TheISSIIS62/65WV1288DALLandIS62/65WV1288DBLLꢀ  
areꢀ ꢀ high-speed,ꢀ 1Mꢀ bitꢀ staticꢀ RAMsꢀ organizedꢀ asꢀ  
128Kꢀwordsꢀbyꢀ8ꢀbits.ꢀItꢀisꢀfabricatedꢀusingꢀISSI'sꢀhigh-  
•ꢀ High-speedꢀaccessꢀtime:ꢀꢀ35ns,ꢀ45ns,ꢀ55ns  
•ꢀ CMOSꢀlowꢀpowerꢀoperation:  
ꢀ 12ꢀmWꢀ(typical)ꢀoperating  
coupledꢀwithꢀinnovativeꢀcircuitꢀdesignꢀtechniques,ꢀyieldsꢀ  
high-performanceꢀandꢀlowꢀpowerꢀconsumptionꢀdevices.  
ꢀ ꢀ4ꢀµWꢀ(typical)ꢀCMOSꢀstandby  
•ꢀ TTLꢀcompatibleꢀinterfaceꢀlevels  
•ꢀ Singleꢀpowerꢀsupply:ꢀꢀ  
WhenCS1isHIGH(deselected)orwhenCS2isLOWꢀ  
(deselected),ꢀ theꢀ deviceꢀ assumesꢀ aꢀ standbyꢀ modeꢀ atꢀ  
whichthepowerdissipationcanbereduceddownwithꢀ  
CMOSꢀinputꢀlevels.  
ꢀ ꢀ1.65V--2.2VꢀVdd (62WV1288dALL)  
ꢀ ꢀ2.3V--3.6VꢀVdd (62WV1288dBLL)  
EasymemoryexpansionꢀisꢀprovidedꢀbyꢀusingꢀChipꢀEnableꢀ  
andꢀOutputꢀEnableꢀinputs.ꢀTheꢀactiveꢀLOWꢀWriteꢀEnableꢀ  
(WE)ꢀcontrolsꢀbothꢀwritingꢀandꢀreadingꢀofꢀtheꢀmemory.  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefreshꢀ  
required  
TheIS62/65WV1288DALLandIS62/65WV1288DBLLareꢀ  
packagedꢀinꢀtheꢀJEDECꢀstandardꢀ32-pinꢀTSOPꢀ(TYPEI),ꢀ  
sTSOPꢀ(TYPEI),ꢀSOP,ꢀandꢀ36-pinꢀminiꢀBGA.  
•ꢀ Threeꢀstateꢀoutputs  
•ꢀ Industrialꢀandꢀautomotiveꢀtemperatureꢀsupport  
•ꢀ Lead-freeꢀavailableꢀ  
FUNCTIONALꢀBLOCKꢀDIAGRAM  
128K x 8  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
Copyrightꢀ©ꢀ2010ꢀIntegratedꢀSiliconꢀSolution,ꢀInc.ꢀꢀAllꢀrightsꢀreserved.ꢀꢀISSIꢀreservesꢀtheꢀrightꢀtoꢀmakeꢀchangesꢀtoꢀthisꢀspecificationꢀandꢀitsꢀproductsꢀatꢀanyꢀtimeꢀwithoutꢀ  
notice.ꢀꢀꢀISSIꢀassumesꢀnoꢀliabilityꢀarisingꢀoutꢀofꢀtheꢀapplicationꢀorꢀuseꢀofꢀanyꢀinformation,ꢀproductsꢀorꢀservicesꢀdescribedꢀherein.ꢀCustomersꢀareꢀadvisedꢀtoꢀobtainꢀtheꢀlat-  
estꢀversionꢀofꢀthisꢀdeviceꢀspecificationꢀbeforeꢀrelyingꢀonꢀanyꢀpublishedꢀinformationꢀandꢀbeforeꢀplacingꢀordersꢀforꢀproducts.  
IntegratedꢀSiliconꢀSolution,ꢀInc.ꢀdoesꢀnotꢀrecommendꢀtheꢀuseꢀofꢀanyꢀofꢀitsꢀproductsꢀinꢀlifeꢀsupportꢀapplicationsꢀwhereꢀtheꢀfailureꢀorꢀmalfunctionꢀofꢀtheꢀproductꢀcanꢀreason-  
ablyꢀbeꢀexpectedꢀtoꢀcauseꢀfailureꢀofꢀtheꢀlifeꢀsupportꢀsystemꢀorꢀtoꢀsignificantlyꢀaffectꢀitsꢀsafetyꢀorꢀeffectiveness.ꢀProductsꢀareꢀnotꢀauthorizedꢀforꢀuseꢀinꢀsuchꢀapplicationsꢀ  
unlessꢀIntegratedꢀSiliconꢀSolution,ꢀInc.ꢀreceivesꢀwrittenꢀassuranceꢀtoꢀitsꢀsatisfaction,ꢀthat:  
a.)ꢀtheꢀriskꢀofꢀinjuryꢀorꢀdamageꢀhasꢀbeenꢀminimized;  
b.)ꢀtheꢀuserꢀassumeꢀallꢀsuchꢀrisks;ꢀand  
c.)ꢀpotentialꢀliabilityꢀofꢀIntegratedꢀSiliconꢀSolution,ꢀIncꢀisꢀadequatelyꢀprotectedꢀunderꢀtheꢀcircumstancesꢀꢀ  
Integrated Silicon Solution, Inc. — www.issi.com ꢀ  
1
Rev.ꢀ B  
12/01/2010  

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