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IS61C6416AL-12T PDF预览

IS61C6416AL-12T

更新时间: 2024-11-23 22:20:07
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
17页 92K
描述
64K x 16 HIGH-SPEED CMOS STATIC RAM

IS61C6416AL-12T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSOP2
包装说明:PLASTIC, TSOP2-44针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41风险等级:5.64
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G44JESD-609代码:e0
长度:18.415 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3功能数量:1
端子数量:44字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:64KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP44,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.00009 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.05 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.16 mm
Base Number Matches:1

IS61C6416AL-12T 数据手册

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®
IS61C6416AL IS64C6416AL  
IS62C6416AL IS65C6416AL  
ISSI  
64K x 16 HIGH-SPEED CMOS STATIC RAM  
JANUARY2005  
FEATURES  
DESCRIPTION  
The ISSIIS61C6416AL, IS62C6416AL, IS64C6416AL and  
IS65C6416AL are high-speed, 1,048,576-bit static RAMs  
organized as 65,536 words by 16 bits. They are fabricated  
usingISSI'shigh-performanceCMOStechnology.Thishighly  
reliable process coupled with innovative circuit design tech-  
niques, yields access times as fast as 12 ns with low power  
consumption.  
IS61C6416AL and IS64C6416AL  
• High-speed access time: 12 ns, 15ns  
• Low Active Power: 175 mW (typical)  
• Low Standby Power: 1 mW (typical)  
CMOS standby  
IS62C6416AL and IS65C6416AL  
When CE is HIGH (deselected), the device assumes a  
standbymodeatwhichthepowerdissipationcanbereduced  
down with CMOS input levels.  
• High-speed access time: 35 ns, 45ns  
• Low Active Power: 50 mW (typical)  
• Low Standby Power: 100 µW (typical)  
CMOS standby  
Easy memory expansion is provided by using Chip Enable  
andOutputEnableinputs,CEandOE.TheactiveLOWWrite  
Enable(WE)controlsbothwritingandreadingofthememory.  
A data byte allows Upper Byte (UB) and Lower Byte (LB)  
access.  
• TTL compatible interface levels  
• Single 5V ± 10% power supply  
• Fully static operation: no clock or refresh  
required  
The IS61C6416AL, IS62C6416AL, IS64C6416AL and  
IS65C6416AL are packaged in the JEDEC standard 44-pin  
400-mil SOJ and 44-pin TSOP (Type II).  
• Available in 44-pin SOJ package and  
44-pin TSOP (Type II)  
• Commercial, Industrial and Automotive tempera-  
ture ranges available  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
64K x 16  
MEMORY ARRAY  
A0-A15  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. A  
1
01/17/05  

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