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IS61C64AH-25J PDF预览

IS61C64AH-25J

更新时间: 2024-11-18 21:54:27
品牌 Logo 应用领域
矽成 - ICSI 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
8页 435K
描述
8K x 8 HIGH-SPEED CMOS STATIC RAM

IS61C64AH-25J 技术参数

是否Rohs认证:不符合生命周期:Transferred
包装说明:SOJ, SOJ28,.34Reach Compliance Code:unknown
风险等级:5.86Is Samacsys:N
最长访问时间:25 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-J28JESD-609代码:e0
内存密度:65536 bit内存集成电路类型:STANDARD SRAM
内存宽度:8端子数量:28
字数:8192 words字数代码:8000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:8KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ28,.34
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified最大待机电流:0.006 A
最小待机电流:4.5 V子类别:SRAMs
最大压摆率:0.11 mA标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

IS61C64AH-25J 数据手册

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IS61C64AH  
8K x 8 HIGH-SPEED CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
The ICSI IS61C64AH is a very high-speed, low power,  
8192-word by 8-bit static RAM. It is fabricated using ICSI's  
high-performance CMOS technology. This highly reliable pro-  
cess coupled with innovative circuit design techniques, yields  
access times as fast as 15 ns with low power consumption.  
• High-speed access time: 15, 20, 25 ns  
• Automatic power-down when chip is  
deselected  
• CMOS low power operation  
— 450 mW (typical) operating  
— 250 µW (typical) standby  
• TTL compatible interface levels  
• Single 5V power supply  
When CE1 is HIGH or CE2 is LOW (deselected), the device  
assumes a standby mode at which the power dissipation can  
be reduced down to 250 µW (typical) with CMOS input levels.  
Easy memory expansion is provided by using two Chip Enable  
inputs, CE1 and CE2. The active LOW Write Enable (WE)  
controls both writing and reading of the memory.  
• Fully static operation: no clock or refresh  
required  
• Three state outputs  
The IS61C64AH is packaged in the JEDEC standard 28-pin,  
300mil SOJ and 330mil SOP.  
• Two Chip Enables (CE1 and CE2) for  
simple memory expansion  
FUNCTIONAL BLOCK DIAGRAM  
256 X 256  
MEMORY ARRAY  
A0-A12  
DECODER  
VCC  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE2  
CE1  
OE  
CONTROL  
CIRCUIT  
WE  
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors  
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.  
Integrated Circuit Solution Inc.  
1
SR001-B  

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