5秒后页面跳转
ICS9219YG-T PDF预览

ICS9219YG-T

更新时间: 2024-09-29 14:51:23
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
8页 80K
描述
Processor Specific Clock Generator, 533.3MHz, PDSO16, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-16

ICS9219YG-T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.33
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm湿度敏感等级:1
端子数量:16最高工作温度:85 °C
最低工作温度:最大输出时钟频率:533.3 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

ICS9219YG-T 数据手册

 浏览型号ICS9219YG-T的Datasheet PDF文件第2页浏览型号ICS9219YG-T的Datasheet PDF文件第3页浏览型号ICS9219YG-T的Datasheet PDF文件第4页浏览型号ICS9219YG-T的Datasheet PDF文件第5页浏览型号ICS9219YG-T的Datasheet PDF文件第6页浏览型号ICS9219YG-T的Datasheet PDF文件第7页 
ICS9219  
Integrated  
Circuit  
Systems,Inc.  
Direct Rambus™ Clock Generator Lite  
General Description  
Features  
TM  
Compatible with all Direct Rambus based ICs  
ICS9219 is a High-speed clock generator providing 400 or  
533 MHz differential clock source for direct Rambus  
memory system. ICS9219 takes a crystal as an input  
reference source, and produces the differential output  
clock required for the Rambus channel. ICS9219 provides  
a solution for a broad range of Direct Rambus memory  
applications. ICS9219 can be used in single or dual  
Rambus channels. An additional LVCMOS output, which  
provides a reference clock at the crystal frequency for the  
other system blocks is also included.  
Provides differential clock source for direct  
Rambus memory system with 1GHz data transfer  
rate capability  
Cycle to Cycle jitter is less than 100ps  
3.3V + 4% supply  
LVCMOS REF clock @ crystal frequency  
Output edge rate control to minimize EMI  
Block Diagram  
Pin Configuration  
FS0  
VDDT 1  
GND 2  
X2 3  
16 FS0*  
15 VDD  
14 GND  
13 BUSCLKT  
12 BUSCLKC  
11 GND  
10 VDD  
9 FS2*  
X1  
Xtal  
OSC  
BUSCLKT  
PLL  
BUSCLKC  
X2  
X1 4  
VDD 5  
REF 6  
GND 7  
FS1* 8  
REF  
VDDT  
FS1  
FS2  
Control  
Logic  
16-Pin 173 mil TSSOP  
* Pins have 60K internal pull-up to VDD  
Table 1. PLL Multiplier Selection and Output Frequency  
BUSCLK1  
FS0  
0
Mult  
16  
400.00  
21.332  
1
533.30  
Notes:  
1 Output frequencies are based on 25MHz XTAL Input  
multipliers are also applicable to spread spectrum modulated input clocks.  
2 Default muliplier value at power up.  
0931B—10/25/04  

与ICS9219YG-T相关器件

型号 品牌 获取价格 描述 数据表
ICS9220 IDT

获取价格

Programmable RambusTM XDRTM Clock Generator
ICS9220B IDT

获取价格

Programmable RambusTM XDRTM Clock Generator
ICS9220YGLF-T IDT

获取价格

Processor Specific Clock Generator, PDSO28, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153
ICS9222-01 ICSI

获取价格

Dual Memory Clock Generator
ICS9222-01 IDT

获取价格

Dual Memory Clock Generator
ICS9222G-01LF-T IDT

获取价格

Clock Driver, PDSO28
ICS9222G-01-T IDT

获取价格

Clock Driver, PDSO28
ICS9222-YG01LF-T IDT

获取价格

PLL Based Clock Driver, 9222 Series, 2 True Output(s), 2 Inverted Output(s), PDSO28, 4.40
ICS9222YG-01LF-T IDT

获取价格

PLL Based Clock Driver, 9222 Series, 2 True Output(s), 2 Inverted Output(s), PDSO28, 4.40
ICS9222YG-01-T IDT

获取价格

PLL Based Clock Driver, 9222 Series, 2 True Output(s), 2 Inverted Output(s), PDSO28, 4.40