Datasheet > ICS9222-01

ICS9222-01

更新时间： 2024-11-11 11:14:51

品牌	Logo	应用领域
艾迪悌 - IDT		时钟发生器
页数	文件大小	规格书
6页	94K
描述
Dual Memory Clock Generator

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中文翻译

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数据手册

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ICS9222-01 数据手册

Integrated

Circuit

Systems, Inc.

ICS9222-01

Dual Memory Clock Generator

General Description

Features

•

Compatible with all Direct Rambus™ based ICs

The ICS9222-01 is a High-speed clock generator providing

two channels up to 450 MHz differential clock source for

direct Rambus_memory system. It includes two independent

DDLL’s (Distributed Delay locked loop) and phase detection

mechanisms to synchronize eachdirect Rambus_ channel

clock to an external system clock. ICS9222-01 provides a

solution for a broad range of Direct Rambus memory

applications. The device works in conjunction with the

ICS964S101, as well as 9250-22 and others (depending on

chipset).

Up to 450 MHz differential clock source for direct

Rambus™ memory system

Cycle to cycle jitter is less than 100 ps

3.3 ± 5% supply

•

Synchronization flexibility: Supports systems that need

clock domains of Rambus channel to synchronize with

system or processor clock, or systems that do not

require synchronization of the Rambus clock to another

system clock.

The ICS9222-01 power management support system turns

“off” the Rambus channel clock to minimize power

consumption for mobile and other power sensitive

applications. In “clock off” mode the device remains “on”

while the output is disabled, allowing fast transitions between

clock-off and clock–on states. In “power down” mode it

completely powers down for minimum power dissipation.

•

Excellent power management support

REFCLK input is from the main clock generator such as

a 9250-22.

Pin Configuration

Block Diagram

CLK_STOP#

PD#

VDDREF

REFCLK

VDDC

SYNCLK0

PCLK0

GND

VDDP

GND

SYNCLK1

PCLK1

FS0

FS1

FS2

GND

CLKB0

CLK0

VDDCLK

CLK1

CLKB1

GND

MULT_0

MULT_1

MULT_2

Test MUX

FS (2:0)

Bypass MUX

Bypclk

GND

PLLclk

PCLK1

SYNCLK1

Phase

Detector

CLK1

Phase

Aligner

CLKB1

REFCLK

GND

PLL

VDDC

CLK0

Phase

Aligner

CLKB0

VDDIPD

CLK_STOP#

PD#

MULT (2:0)

Phase

Detector

GND

PAclk

PCLK0

SYNCLK0

28-Pin TSSOP

0274C—11/14/05

12 3 4 5 6

中文翻译

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与ICS9222-01相关器件

型号	品牌	获取价格	描述	数据表
ICS9222G-01LF-T	IDT	获取价格	Clock Driver, PDSO28
ICS9222G-01-T	IDT	获取价格	Clock Driver, PDSO28
ICS9222-YG01LF-T	IDT	获取价格	PLL Based Clock Driver, 9222 Series, 2 True Output(s), 2 Inverted Output(s), PDSO28, 4.40
ICS9222YG-01LF-T	IDT	获取价格	PLL Based Clock Driver, 9222 Series, 2 True Output(s), 2 Inverted Output(s), PDSO28, 4.40
ICS9222YG-01-T	IDT	获取价格	PLL Based Clock Driver, 9222 Series, 2 True Output(s), 2 Inverted Output(s), PDSO28, 4.40
ICS9248-101	ICSI	获取价格	Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6
ICS9248-103	ICSI	获取价格	Frequency Generator & Integrated Buffers for PENTIUM/ProTM
ICS9248-107	ICSI	获取价格	Frequency Timing Generator for PENTIUM II Systems
ICS9248-110	ICSI	获取价格	AMD-K7TM System Clock Chip
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