Integrated
Circuit
Systems, Inc.
ICS9248-157
Frequency Timing Generator for Pentium II Systems
Recommended Application:
ALI1621/1632M style chipsets
Output Features:
•
•
•
•
2 - CPUs @2.5V, up to 140MHz.
7 - PCI @3.3V, (including one free running)
1 - 48MHz, @3.3V fixed.
Pin Configuration
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
*FS1/REF0
X1
VDDR
2 - REF @3.3V, 14.318MHz.
REF1/FS0*
SPREAD#
VDDL
CPUCLK1
CPUCLK0/F
GNDL
GND
PCI_STOP#
VDDA
3
X2
Features:
•
•
4
**FS2/PCICLK_F
*SEL_CPUF#/PCICLK0
PCICLK1
5
Up to 140 MHz frequency support
Support power management: CPU, PCI stop and
Power down.
Spread spectrum for EMI control (0.5% down spread).
Uses external 14.318MHz crystal
FS pins for frequency select
6
7
GND
VDDPCI
PCICLK2
PCICLK3
PCICLK4
PCICLK_E
VDD48
8
•
•
•
9
10
11
12
13
14
CPU_STOP#
PD#
DIV/4#
Key Specifications:
GND
*FS3/48MHz
•
•
•
•
CPU – CPU: <175ps
PCI – PCI: <250ps
CPU(early)-PCI: 1.5ns - 4ns
PCI_E (early) - PCI: 2.1ns
28 Pin 209mil SSOP
*These inputs have a 120K pull up to VDD
**These inputs have a 120K pull down to GND
Block Diagram
Functionality
FS3
0
FS2
0
FS1 FS0
CPU
33.33
63.33
69.99
66.66
97.00
96.22
91.50
83.33
50.00
95.25
105.00
100.00
66.66
126.35
139.65
133.33
PCI
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
16.66
31.66
35.00
33.33
32.33
32.07
30.50
27.77
16.66
31.75
35.00
33.33
16.66
31.66
35.00
33.33
0
0
X1
REF (1:0)
OSC
2
X2
0
0
0
0
CPU_STOP#
0
1
PLL
Spread
Spectrum
CPU
STOP
0
1
CPUCLK 1
FS (3:0)
2
/ 4
0
1
CPU
STOP
CPUCLK0/F
0
1
Glitch
Free
Control
Logic
PD#
Div4#
1
0
/ 2
/ 3
BUS
STOP
SPREAD#
PCICLK (4:0),
PCICLK_E
5
1
0
SEL_CPUF#
PCI_STOP#
1
0
PCICLK_F
48MHz
1
0
1
1
PLL2
1
1
1
1
1
1
ICS reserves the right to make changes in the device data
identified in this publication without further notice. ICS advises
its customers to obtain the latest version of all device data to
verify that any information being relied upon by the customer is
9248-157 Rev A - 1/16/01
Third party brands and names are the property of their respective owners.