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FQU2N50B PDF预览

FQU2N50B

更新时间: 2024-11-20 22:18:27
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 晶体晶体管功率场效应晶体管开关脉冲
页数 文件大小 规格书
9页 599K
描述
500V N-Channel MOSFET

FQU2N50B 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TO-251包装说明:IPAK-3
针数:3Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8541.29.00.95
风险等级:5.69Is Samacsys:N
雪崩能效等级(Eas):120 mJ配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:500 V最大漏极电流 (Abs) (ID):1.6 A
最大漏极电流 (ID):1.6 A最大漏源导通电阻:5.3 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:TO-251
JESD-30 代码:R-PSIP-T3JESD-609代码:e0
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):30 W
最大脉冲漏极电流 (IDM):6.4 A认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:NO
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

FQU2N50B 数据手册

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May 2000  
TM  
QFET  
FQD2N50B / FQU2N50B  
500V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switch mode power supply, power  
factor correction, electronic lamp ballast based on half  
bridge.  
1.6A, 500V, R  
= 5.3@V = 10 V  
DS(on) GS  
Low gate charge ( typical 6.0 nC)  
Low Crss ( typical 4.0 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
D
!
D
"
! "  
"
"
!
G
I-PAK  
FQU Series  
D-PAK  
FQD Series  
G
S
G
D
!
S
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQD2N50 / FQU2N50  
Units  
V
V
I
Drain-Source Voltage  
500  
1.6  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
1.0  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
6.4  
A
DM  
V
E
I
Gate-Source Voltage  
± 30  
120  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
1.6  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
3.0  
mJ  
V/ns  
W
AR  
dv/dt  
4.5  
Power Dissipation (T = 25°C) *  
2.5  
P
A
D
Power Dissipation (T = 25°C)  
30  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.24  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
4.17  
50  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
110  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2000 Fairchild Semiconductor International  
Rev. A, May 2000  

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