TM
QFET
FQA18N50V2
500V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficient switched mode power supplies,
active power factor correction, electronic lamp ballast
based on half bridge topology.
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•
•
•
•
•
20A, 500V, R
= 0.265Ω @V = 10 V
DS(on) GS
Low gate charge ( typical 42 nC)
Low Crss ( typical 11 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
"
! "
"
!
G
"
!
S
TO-3P
FQA Series
G D S
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQA18N50V2
Units
V
V
I
Drain-Source Voltage
500
20
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
12.7
80
A
C
I
(Note 1)
Drain Current
- Pulsed
A
DM
V
E
I
Gate-Source Voltage
± 30
330
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
20
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
27.7
4.5
mJ
V/ns
W
AR
dv/dt
P
Power Dissipation (T = 25°C)
277
D
C
- Derate above 25°C
Operating and Storage Temperature Range
2.22
-55 to +150
W/°C
°C
T , T
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
Typ
--
Max
0.45
--
Units
°C/W
°C/W
°C/W
R
R
R
θJC
θCS
θJA
0.24
--
40
©2002 Fairchild Semiconductor Corporation
Rev. B, August 2002