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FDMS9620S PDF预览

FDMS9620S

更新时间: 2024-11-13 03:36:27
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 279K
描述
Dual N-Channel PowerTrench㈢ MOSFET Q1: 30V, 16A, 21.5mヘ Q2: 30V, 18A, 13mヘ

FDMS9620S 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:MLP
包装说明:SMALL OUTLINE, R-PDSO-N8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.29.00.95风险等级:5.71
外壳连接:DRAIN配置:SERIES, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压:30 V最大漏极电流 (Abs) (ID):44 A
最大漏极电流 (ID):7.5 A最大漏源导通电阻:0.0215 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-N8
JESD-609代码:e4湿度敏感等级:1
元件数量:2端子数量:8
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):2.5 W
最大脉冲漏极电流 (IDM):60 A认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:YES
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:NO LEAD
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

FDMS9620S 数据手册

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April 2007  
FDMS9620S  
tm  
Dual N-Channel PowerTrench® MOSFET  
Q1: 30V, 16A, 21.5mΩ Q2: 30V, 18A, 13mΩ  
Features  
General Description  
Q1: N-Channel  
This device includes two specialized MOSFETs in a unique dual  
Power 56 package. It is designed to provide an optimal  
Synchronous Buck power stage in terms of efficiency and PCB  
utilization. The low switching loss "High Side" MOSFET is  
complemented by a Low Conduction Loss "Low Side" SyncFET.  
„ Max rDS(on) = 21.5mΩ at VGS = 10V, ID = 7.5A  
„ Max rDS(on) = 29.5mΩ at VGS = 4.5V, ID = 6.5A  
Q2: N-Channel  
„ Max rDS(on) = 13mΩ at VGS = 10V, ID = 10A  
„ Max rDS(on) = 17mΩ at VGS = 4.5V, ID = 8.5A  
Application  
Synchronous Buck Converter for:  
„ Low Qg high side MOSFET  
„ Notebook System Power  
„ Low rDS(on) low side MOSFET  
„ Thermally efficient dual Power 56 package  
„ Pinout optimized for simple PCB design  
„ RoHS Compliant  
„ General Purpose Point of Load  
G1  
D1  
Q2  
5
6
7
8
4
3
2
1
D1  
D1  
D1  
S1/D2  
G2  
S2  
S2  
Q1  
S2  
Power 56  
MOSFET Maximum Ratings TA = 25°C unless otherwise noted  
Symbol  
VDS  
VGS  
Parameter  
Q1  
30  
Q2  
30  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
V
V
±20  
16  
±20  
18  
Drain Current  
-Continuous (Package limited) TC = 25°C  
-Continuous (Silicon limited)  
-Continuous  
T
C = 25°C  
21  
44  
ID  
A
TA = 25°C  
(Note 1a)  
7.5  
60  
10  
-Pulsed  
60  
Power Dissipation for Single Operation  
TA = 25°C  
TA = 25°C  
(Note 1a)  
(Note 1b)  
2.5  
1
PD  
W
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJA  
RθJA  
RθJC  
Thermal Resistance, Junction to Ambient  
(Note 1a)  
(Note 1b)  
50  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Case  
120  
°C/W  
8.2  
3.1  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
Tape Width  
Quantity  
3000 units  
FDMS9620S  
FDMS9620S  
Power 56  
13”  
12mm  
1
©2007 Fairchild Semiconductor Corporation  
FDMS9620S Rev.D  
www.fairchildsemi.com  

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