5秒后页面跳转
捷配首页

Datasheet > 存储 > SRAM> CY7C135-25JC
CY7C135-25JC PDF预览

CY7C135-25JC

更新时间： 2024-11-05 22:02:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器
页数 文件大小 规格书
12页 554K
描述
4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores

阅读下载

中文翻译

获取价格

CY7C135-25JC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：LCC包装说明：PLASTIC, LCC-52
针数：52Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.32.00.41
Factory Lead Time：1 week风险等级：5.74
最长访问时间：25 nsI/O 类型：COMMON
JESD-30 代码：S-PQCC-J52JESD-609代码：e0
长度：19.1262 mm内存密度：32768 bit
内存集成电路类型：DUAL-PORT SRAM内存宽度：8
湿度敏感等级：3功能数量：1
端口数量：2端子数量：52
字数：4096 words字数代码：4000
工作模式：ASYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：4KX8
输出特性：3-STATE可输出：YES
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC52,.8SQ封装形状：SQUARE
封装形式：CHIP CARRIER并行/串行：PARALLEL
峰值回流温度（摄氏度）：225电源：5 V
认证状态：Not Qualified座面最大高度：5.08 mm
最大待机电流：0.015 A最小待机电流：4.5 V
子类别：SRAMs最大压摆率：0.18 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：TIN LEAD端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：19.1262 mm
Base Number Matches：1

CY7C135-25JC 数据手册

 浏览型号CY7C135-25JC的Datasheet PDF文件第2页浏览型号CY7C135-25JC的Datasheet PDF文件第3页浏览型号CY7C135-25JC的Datasheet PDF文件第4页浏览型号CY7C135-25JC的Datasheet PDF文件第5页浏览型号CY7C135-25JC的Datasheet PDF文件第6页浏览型号CY7C135-25JC的Datasheet PDF文件第7页 
CY7C135  
CY7C1342  
4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port  
SRAM with Semaphores  
Features  
Functional Description  
• True Dual-Ported memory cells which allow simulta-  
The CY7C135 and CY7C1342 are high-speed CMOS 4K x 8  
dual-port static RAMs. The CY7C1342 includes semaphores  
that provide a means to allocate portions of the dual-port RAM  
or any shared resource. Two ports are provided permitting in-  
dependent, asynchronous access for reads and writes to any  
location in memory. Application areas include interproces-  
sor/multiprocessor designs, communications status buffering,  
and dual-port video/graphics memory.  
neous reads of the same memory location  
• 4K x 8 organization  
• 0.65-micron CMOS for optimum speed/power  
• High-speed access: 15 ns  
• Low operating power: ICC = 160 mA (max.)  
• Fully asynchronous operation  
• Automatic power-down  
• Semaphoresincludedonthe7C1342topermitsoftware  
handshaking between ports  
• Available in 52-pin PLCC  
Each port has independent control pins: chip enable (CE),  
read or write enable (R/W), and output enable (OE). The  
CY7C135 is suited for those systems that do not require  
on-chip arbitration or are intolerant of wait states. Therefore,  
the user must be aware that simultaneous access to a location  
is possible. Semaphores are offered on the CY7C1342 to as-  
sist in arbitrating between ports. The semaphore logic is com-  
prised of eight shared latches. Only one side can control the  
latch (semaphore) at any time. Control of a semaphore indi-  
cates that a shared resource is in use. An automatic pow-  
er-down feature is controlled independently on each port by a  
chip enable (CE) pin or SEM pin (CY7C1342 only).  
The CY7C135 and CY7C1342 are available in 52-pin PLCC.  
Logic Block Diagram  
R/W  
L
R/W  
R
CE  
L
CE  
R
OE  
R
OE  
L
I/O  
7L  
I/O  
I/O  
7R  
I/O  
CONTROL  
I/O  
CONTROL  
I/O  
0L  
0R  
A
A
11L  
0L  
11R  
ADDRESS  
DECODER  
ADDRESS  
DECODER  
MEMORY  
ARRAY  
A
A
0R  
SEMAPHORE  
ARBITRATION  
(7C1342 only)  
CE  
L
CE  
R
OE  
L
OE  
R
R/W  
R/W  
R
L
(7C1342 only)  
(7C1342 only)  
1342–1  
SEM  
R
SEM  
L
Cypress Semiconductor Corporation  
Document #: 38-06038 Rev. *B  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
Revised June 22, 2004  
1234567...12

中文翻译

下载PDF

与CY7C135-25JC相关器件

型号 品牌 获取价格 描述 数据表
CY7C135-25JCT CYPRESS

获取价格

 		Dual-Port SRAM, 4KX8, 25ns, CMOS, PQCC52, PLASTIC, LCC-52
CY7C135-25JI CYPRESS

获取价格

 		4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores
CY7C135-25JXC CYPRESS

获取价格

 		4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores
CY7C1352-80AC CYPRESS

获取价格

 		256K x18 Pipelined SRAM with NoBL Architecture
CY7C1352B CYPRESS

获取价格

 		256K x 18 Pipilined SRAm with NoBL Architecture
CY7C1352B-100AC CYPRESS

获取价格

 		256K x 18 Pipilined SRAm with NoBL Architecture
CY7C1352B-100ACT CYPRESS

获取价格

 		暂无描述
CY7C1352B-133AC CYPRESS

获取价格

 		256K x 18 Pipilined SRAm with NoBL Architecture
CY7C1352B-143AC CYPRESS

获取价格

 		256K x 18 Pipilined SRAm with NoBL Architecture
CY7C1352B-143ACT CYPRESS

获取价格

 		ZBT SRAM, 256KX18, 4ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100

与CY7C135-25JC相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证