Datasheet > CY62256VN_09

CY62256VN_09

更新时间： 2024-09-14 11:53:47

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
13页	410K
描述
256K (32K x 8) Static RAM

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CY62256VN_09 数据手册

CY62256VN

256K (32K x 8) Static RAM

Features

Functional Description

■

Temperature Ranges

The CY62256VN^[1]family is composed of two high performance

CMOS static RAM’s organized as 32K words by 8 bits. Easy

memory expansion is provided by an active LOW chip enable

(CE) and active LOW output enable (OE) and tristate drivers.

These devices have an automatic power down feature, reducing

the power consumption by over 99% when deselected.

❐

Commercial: 0°C to 70°C

Industrial: –40°C to 85°C

Automotive-A: –40°C to 85°C

Automotive-E: –40°C to 125°C

■

Speed: 70 ns

An active LOW write enable signal (WE) controls the

writing/reading operation of the memory. When CE and WE

inputs are both LOW, data on the eight data input/output pins

(I/O₀through I/O₇) is written into the memory location addressed

by the address present on the address pins (A₀through A₁₄).

Reading the device is accomplished by selecting the device and

enabling the outputs, CE and OE active LOW, while WE remains

inactive or HIGH. Under these conditions, the contents of the

location addressed by the information on address pins are

present on the eight data input/output pins.

Low Voltage Range: 2.7V to 3.6V

Low Active Power and Standby Power

Easy Memory Expansion with CE and OE Features

TTL Compatible Inputs and Outputs

Automatic Power Down when Deselected

CMOS for Optimum Speed and Power

The input/output pins remain in a high impedance state unless

the chip is selected, outputs are enabled, and write enable (WE)

is HIGH.

Available in Standard Pb-free and non Pb-free 28-Pin (300-mil)

Narrow SOIC, 28-Pin TSOP-I, and 28-Pin Reverse TSOP-I

Packages

Logic Block Diagram

I/O

INPUTBUFFER

32K x 8

ARRAY

POWER

DOWN

COLUMN

DECODER

I/O

Note

1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Cypress Semiconductor Corporation

Document #: 001-06512 Rev. *B

•

198 Champion Court

•

San Jose

CA 95134-1709

•

408-943-2600

Revised September 25, 2009

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与CY62256VN_09相关器件

型号	品牌	获取价格	描述	数据表
CY62256VN_11	CYPRESS	获取价格	256K (32K × 8) Static RAM
CY62256VNLL	CYPRESS	获取价格	256K (32K × 8) Static RAM
CY62256VNLL-70SNC	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256VNLL-70SNC	ROCHESTER	获取价格	32KX8 STANDARD SRAM, 70ns, PDSO28, 0.300 INCH, SOIC-28
CY62256VNLL-70SNCT	CYPRESS	获取价格	Standard SRAM, 32KX8, 70ns, CMOS, PDSO28, 0.300 INCH, SOIC-28
CY62256VNLL-70SNXC	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256VNLL-70SNXC	ROCHESTER	获取价格	32KX8 STANDARD SRAM, 70ns, PDSO28, 0.300 INCH, LEAD FREE, SOIC-28
CY62256VNLL-70SNXCT	CYPRESS	获取价格	Standard SRAM, 32KX8, 70ns, CMOS, PDSO28, 0.300 INCH, LEAD FREE, SOIC-28
CY62256VNLL-70SNXE	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256VNLL-70SNXET	CYPRESS	获取价格	Standard SRAM, 32KX8, 70ns, CMOS, PDSO28, 0.300 INCH, LEAD FREE, SOIC-28

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