CDCVF25084PWRG4

更新时间： 2024-10-02 12:54:35

品牌	Logo	应用领域
德州仪器 - TI		时钟驱动器逻辑集成电路光电二极管
页数	文件大小	规格书
15页	539K
描述
3.3-V 1:8 ZERO DELAY (PLL) x4 CLOCK MULTIPLIER

阅读下载

中文翻译

获取价格

技术参数
数据手册
替代型号

如果您发现信息不准确，欢迎纠错

CDCVF25084PWRG4 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	TSSOP
包装说明：	TSSOP-16	针数：	16
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
Factory Lead Time：	6 weeks	风险等级：	5.38
Is Samacsys：	N	系列：	25084
输入调节：	STANDARD	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e4	长度：	5 mm
负载电容（CL）：	15 pF	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
最大I（ol）：	0.012 A	湿度敏感等级：	1
功能数量：	1	反相输出次数：
端子数量：	16	实输出次数：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE WITH SERIES RESISTOR	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：	TR	峰值回流温度（摄氏度）：	260
电源：	3.3 V	Prop。Delay @ Nom-Sup：	4.5 ns
传播延迟（tpd）：	4.5 ns	认证状态：	Not Qualified
Same Edge Skew-Max（tskwd）：	0.15 ns	座面最大高度：	1.2 mm
子类别：	Clock Drivers	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	4.4 mm
最小 fmax：	180 MHz	Base Number Matches：	1

CDCVF25084PWRG4 数据手册

CDCVF25084

3.3-V 1:8 ZERO DELAY (PLL) x4 CLOCK MULTIPLIER

SCAS690A – APRIL 2003 – REVISED MAY 2003

PW PACKAGE (TSSOP)

(TOP VIEW)

Phase-Locked Loop-Based Multiplier by

Four

Input Frequency Range: 2.5 MHz to 45 MHz

CLKIN

1Y0

FBIN

1Y3

1Y2

Output Frequency Range: 10 MHz to

180 MHz

1Y1

LVCMOS/LVTTL I/O Compatible

GND

2Y0

2Y1

GND

2Y3

2Y2

Low Jitter (Cycle-Cycle): ±120 ps Over the

Range 75 MHz to 180 MHz

Distributes One Clock Input to Two Banks

of Four Outputs

Auto Frequency Detection to Disable

Device (Power-Down Mode)

Operates From Single 3.3-V Supply

Industrial Temperature Range –40°C to

85°C

25-Ω On-Chip Series Damping Resistors

No External RC Network Required

Spread Spectrum Clock Compatible (SSC)

Available in 16-Pin TSSOP Package

description

The CDCVF25084 is a high-performance, low-skew, low-jitter, phase-lock loop clock multiplier. It uses a PLL

to precisely align, in both frequency and phase, the output clocks to the input clock signal including a

multiplication factor of four. The CDCVF25084 operates from a nominal supply voltage of 3.3 V. The device also

includes integrated series-damping resistors in the output drivers that make it ideal for driving point-to-point

loads.

Two banks of four outputs each provide low-skew, low-jitter copies of CLKIN x four. All outputs operate at the

same frequency. Output duty cycles are adjusted to 50%, independent of duty cycle at CLKIN. The device

automatically goes into power-down mode when no input signal is applied to CLKIN and the outputs go into a

low state. Unlike many products containing PLLs, the CDCVF25084 does not require an external RC network.

The loop filter for the PLL is included on-chip, minimizing component count, space, and cost.

Because it is based on a PLL circuitry, the CDCVF25084 requires a stabilization time to achieve phase lock of

the feedback signal to the reference signal. This stabilization is required following power up and application of

a fixed-frequency signal at CLKIN and any following changes to the PLL reference.

The CDCVF25084 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

1Y0–1Y3

Hi-Z

2Y0–2Y3

Hi-Z

OUTPUT SOURCE

PLL SHUTDOWN

N/A

Yes

†

Active

Hi-Z

PLL

Input clock (PLL bypass)

Active

Yes

†

PLL

†

A CLK input frequency < 2 MHz switches the outputs to low level.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...15

中文翻译

下载PDF

CDCVF25084PWRG4 替代型号

型号	品牌	替代类型	描述	数据表
CDCVF25084PWR	TI	完全替代	3.3-V 1:8 ZERO DELAY (PLL) x4 CLOCK MULTIPLIER
CDCVF25084PWG4	TI	完全替代	3.3-V 1:8 ZERO DELAY (PLL) x4 CLOCK MULTIPLIER
CDCVF25084PW	TI	完全替代	3.3-V 1:8 ZERO DELAY (PLL) x4 CLOCK MULTIPLIER

与CDCVF25084PWRG4相关器件

型号	品牌	获取价格	描述	数据表
CDCVF2509	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDCVF2509A	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE
CDCVF2509APW	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE
CDCVF2509APWR	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE
CDCVF2509PW	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDCVF2509PWR	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDCVF2510	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER
CDCVF2510A	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE
CDCVF2510APW	TI	获取价格	3.3-V Phase-Lock Loop Clock Driver with Power Down Mode 24-TSSOP 0 to 85
CDCVF2510APWR	TI	获取价格	3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE

与CDCVF25084PWRG4相关文章

塔塔电子与力积电达成技术转让协议，携手建设印度首座晶圆厂
2024-09-29

38
英特尔震撼发布：128核心256线程的至强6性能核处理器
2024-09-29

32
SK海力士量产12层HBM3E，容量高达36GB
2024-09-27

28
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
2024-09-27

40

产品中心

服务支持

精选活动

关于我们

帮助中心

CDCVF25084PWRG4

CDCVF25084PWRG4 技术参数

CDCVF25084PWRG4 数据手册

CDCVF25084PWRG4 替代型号

与CDCVF25084PWRG4相关器件

与CDCVF25084PWRG4相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CDCVF25084PWRG4

CDCVF25084PWRG4 技术参数

CDCVF25084PWRG4 数据手册

CDCVF25084PWRG4 替代型号

与CDCVF25084PWRG4相关器件

与CDCVF25084PWRG4相关文章

您还可以找

您在本页遇到什么问题？