5秒后页面跳转
AS6VA25616 PDF预览

AS6VA25616

更新时间: 2024-10-27 23:13:55
品牌 Logo 应用领域
ALSC 静态存储器
页数 文件大小 规格书
9页 175K
描述
2.7V to 3.3V 256K x 16 Intelliwatt low-power CMOS SRAM with one chip enable

AS6VA25616 数据手册

 浏览型号AS6VA25616的Datasheet PDF文件第1页浏览型号AS6VA25616的Datasheet PDF文件第3页浏览型号AS6VA25616的Datasheet PDF文件第4页浏览型号AS6VA25616的Datasheet PDF文件第5页浏览型号AS6VA25616的Datasheet PDF文件第6页浏览型号AS6VA25616的Datasheet PDF文件第7页 
AS6VA25616  
®
Functional description  
The AS6VA25616 is a low-power CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 262,144 words × 16  
bits. It is designed for memory applications where slow data access, low power, and simple interfacing are desired.  
Equal address access and cycle times (t , t , t ) of 55 ns are ideal for low-power applications. Active high and low chip selects (CS)  
AA RC WC  
permit easy memory expansion with multiple-bank memory systems.  
When CS is high, or UB and LB are high, the device enters standby mode: the AS6VA25616 is guaranteed not to exceed 66 µW power  
consumption at 3.3V and 55 ns. The device also returns data when V is reduced to 1.5V for even lower power consumption.  
CC  
A write cycle is accomplished by asserting write enable (WE) and chip select (CS) low, and UB and/or LB low. Data on the input pins  
I/O1–O16 is written on the rising edge ofWE (write cycle 1) or CS (write cycle 2). To avoid bus contention, external devices should drive  
I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).  
A read cycle is accomplished by asserting output enable (OE), chip select (CS), UB and LB low, with write enable (WE) high. The chip  
drives I/O pins with the data word referenced by the input address. When either chip select or output enable is inactive, or write enable is  
active, or (UB) and (LB), output drivers stay in high-impedance mode.  
These devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written  
and read. LB controls the lower bits, I/O1–I/O8, and UB controls the higher bits, I/O9–I/O16.  
All chip inputs and outputs are CMOS-compatible, and operation is from a single 2.7V to 3.3V supply. Device is available in the JEDEC  
standard 400-mm, TSOP II, and 48-ball FBGA packages.  
Absolute maximum ratings  
Parameter  
Device  
Symbol  
Min  
–0.5  
–0.5  
Max  
V + 0.5  
CC  
Unit  
V
Voltage on V relative to V  
V
CC  
SS  
tIN  
Voltage on any I/O pin relative to GND  
Power dissipation  
V
V
tI/O  
P
1.0  
+150  
+125  
20  
W
D
o
Storage temperature (plastic)  
T
–65  
–55  
C
stg  
o
Temperature with V applied  
T
C
CC  
bias  
DC output current (low)  
I
mA  
OUT  
Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and  
functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied.  
Exposure to absolute maximum rating conditions for extended periods may affect reliability.  
Truth table  
Supply  
CS  
H
WE  
X
OE  
X
LB  
X
H
X
L
UB  
X
H
X
H
L
Current  
I/O1–I/O8 I/O9–I/O16  
Mode  
I
High Z  
High Z  
High Z  
Standby (I )  
SB  
SB  
L
X
X
L
H
H
I
High Z  
High Z  
Output disable (I  
)
CC  
CC  
D
OUT  
L
L
H
L
L
H
L
I
High Z  
D
D
Read (I  
)
CC  
OUT  
OUT  
CC  
L
D
OUT  
L
H
L
D
High Z  
IN  
X
H
L
I
High Z  
D
D
Write (I  
)
CC  
CC  
IN  
IN  
L
D
IN  
Key: X = Don’t care, L = Low, H = High.  
2
ALLIANCE SEMICONDUCTOR  
10/6/00  

与AS6VA25616相关器件

型号 品牌 获取价格 描述 数据表
AS6VA25616-55TC ALSC

获取价格

Standard SRAM, 256KX16, 55ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44
AS6VA25616-BC ALSC

获取价格

2.7V to 3.3V 256K x 16 Intelliwatt low-power CMOS SRAM with one chip enable
AS6VA25616-BI ALSC

获取价格

2.7V to 3.3V 256K x 16 Intelliwatt low-power CMOS SRAM with one chip enable
AS6VA25616-TC ALSC

获取价格

2.7V to 3.3V 256K x 16 Intelliwatt low-power CMOS SRAM with one chip enable
AS6VA25616-TI ALSC

获取价格

2.7V to 3.3V 256K x 16 Intelliwatt low-power CMOS SRAM with one chip enable
AS6VA5128 ETC

获取价格

2.7V to 3.3V 512K X 8 Intelliwatt low-power CMOS SRAM
AS6VA5128-BC ETC

获取价格

2.7V to 3.3V 512K X 8 Intelliwatt low-power CMOS SRAM
AS6VA5128-BI ETC

获取价格

2.7V to 3.3V 512K X 8 Intelliwatt low-power CMOS SRAM
AS6VA5128-HFC ALSC

获取价格

Standard SRAM, 512KX8, 55ns, CMOS, PDSO32, TSOP2-32
AS6VA5128-HFI ALSC

获取价格

Standard SRAM, 512KX8, 55ns, CMOS, PDSO32, TSOP2-32