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AS6VA5128-TI PDF预览

AS6VA5128-TI

更新时间: 2024-10-28 20:55:03
品牌 Logo 应用领域
ALSC 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
11页 199K
描述
Standard SRAM, 512KX8, 55ns, CMOS, PDSO32, 8 X 20 MM, TSOP1-32

AS6VA5128-TI 数据手册

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June 2000  
AS6VA5128  
®
2.7V to 3.3V 512K × 8 Intelliwatt™ low-power CMOS SRAM with one chip enable  
Features  
AS6VA5128  
Easy memory expansion with CS, OE inputs  
Smallest footprint packages  
- 36(48)-ball FBGA  
• Intelliwatt™ active power circuitry  
• Industrial and commercial temperature ranges available  
• Organization: 524,288 words × 8 bits  
• 2.7V to 3.3V at 55 ns  
Low power consumption: ACTIVE  
- 132 mW at 3.3V and 55 ns  
Low power consumption: STANDBY  
- 66 µW max at 3.3V  
- 32-pin TSOP I (available September 2000)  
- 32-pin sTSOP I (available September 2000)  
- 32-pin TSOP II (forward) (available September 2000)  
- 32-pin TSOP II (reverse) (available September 2000)  
ESD protection 2000 volts  
Latch-up current 200 mA  
• 1.2V data retention  
Equal access and cycle times  
Pin arrangement  
Logic block diagram  
V
CC  
A18  
A16  
A14  
1
2
3
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
32  
31  
30  
29  
28  
27  
26  
25  
24  
V
A18  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
V
CC  
CC  
GND  
A15  
A17  
WE  
A13  
A8  
A15  
A17  
WE  
A13  
A8  
Input buffer  
A12  
4
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
A11  
A9  
I/ O8  
I/ O1  
32-pin TSOPII  
(Forward)  
32-pin TSOPII  
(Reverse)  
A11  
OE  
A10  
CS  
I/ O8  
I/ O7  
I/ O6  
I/ O5  
OE  
A10  
512K  
× 8  
A2  
A1  
A0  
23  
22  
21  
Array  
(4,194,304)  
CS  
I/ O8  
I/ O7  
I/ O6  
I/ O5  
20 I/ O1  
19  
18 I/ O3  
17  
I/ O1  
I/ O2  
I/ O3  
I/ O2  
V
I/ O4  
V
SS  
I/ O4  
SS  
WE  
OE  
CS  
Column decoder  
Control  
circuit  
A11  
A9  
A8  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
OE  
A10  
CS  
I/ O8  
I/ O7  
I/ O6  
I/ O5  
I/ O4  
A13  
48-CSP BGA Package (shading indicates no ball)  
WE  
A17  
A15  
1
2
3
4
5
6
32-pin TSOPII  
32-pin sTSOPI  
(Forward)  
V
CC  
A
B
C
D
E
A
A
NC  
WE  
NC  
A
A
A
9
10  
11  
0
1
3
6
8
A18  
A16  
A14  
A12  
V
SS  
I/ O3  
I/ O2  
I/ O1  
A0  
A1  
A2  
I/ O5  
I/ O6  
A
A
A
7
I/ O1  
I/ O2  
VCC  
2
4
12  
13  
14  
15  
16  
A
A7  
A6  
A5  
A4  
20  
19  
18  
17  
5
V
SS  
A3  
VCC  
I/ O7  
I/ O8  
VSS  
F
A
A
I/ O3  
I/ O4  
18  
17  
G
H
OE  
CS  
A
A
15  
16  
A
A
A
A
A
A
14  
9
10  
11  
12  
13  
Selection guide  
VCC Range  
Power Dissipation  
Operating (ICC1  
)
Standby (ISB2)  
Min  
(V)  
Typ2  
(V)  
Max  
(V)  
Speed  
(ns)  
Product  
Max (mA)  
2
Max (µA)  
AS6VA5128  
2.7  
3.0  
3.3  
55  
20  
7/ 14/ 00  
ALLIANCE SEMICONDUCTOR  
1
Copyright ©2000 Alliance Semiconductor. All rights reserved.  

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