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AS6VA5128-BI PDF预览

AS6VA5128-BI

更新时间: 2024-10-27 22:05:51
品牌 Logo 应用领域
其他 - ETC 内存集成电路静态存储器
页数 文件大小 规格书
9页 147K
描述
2.7V to 3.3V 512K X 8 Intelliwatt low-power CMOS SRAM

AS6VA5128-BI 数据手册

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October 2000  
AS6VA5128  
®
2.7V to 3.3V 512K × 8 Intelliwatt™ low-power CMOS SRAM  
Features  
• 1.2V data retention  
• AS6VA5128  
• Equal access and cycle times  
• Intelliwatt™ active power circuitry  
• Industrial and commercial temperature ranges available  
• Organization: 524,288 words × 8 bits  
• 2.7V to 3.3V at 55 ns  
• Low power consumption: ACTIVE  
- 132 mW at 3.3V and 55 ns  
• Easy memory expansion with CS, OE inputs  
• Smallest footprint packages  
- 36(48)-ball FBGA  
- 32-pin TSOP I and TSOP II packages are available on  
Alliance AS6UB5128 product family (available January  
2001)  
• ESD protection 2000 volts  
• Latch-up current 200 mA  
• Low power consumption: STANDBY  
- 66 µW max at 3.3V  
48-CSP BGA Package (shading indicates no ball)  
Logic block diagram  
VCC  
GND  
1
2
3
4
5
6
Input buffer  
A
B
C
D
E
A
A
A
NC  
WE  
NC  
A
A
A
A
A
A
8
0
1
2
3
4
5
6
7
A0  
I/O  
I/O  
I/O  
I/O  
5
6
1
2
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
I/O8  
I/O1  
512K × 8  
Array  
(4,194,304)  
V
V
V
CC  
SS  
V
CC  
SS  
F
I/O  
A
A
A
A
I/O  
I/O  
7
8
18  
17  
16  
12  
3
4
WE  
OE  
CS  
Column decoder  
Control  
circuit  
G
H
I/O  
OE  
CS  
A
A
15  
13  
A
A
A
A
9
10  
11  
14  
Selection guide  
V
Range  
Power Dissipation  
Operating (I Standby (I  
CC  
2
)
)
SB1  
Min  
(V)  
Typ  
Max  
(V)  
Speed  
(ns)  
CC  
Product  
(V)  
Max (mA)  
2
Max (µA)  
AS6VA5128  
2.7  
3.0  
3.3  
55  
20  
10/6/00  
ALLIANCE SEMICONDUCTOR  
1
Copyright ©2000 Alliance Semiconductor. All rights reserved.  

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