生命周期: | Obsolete | 包装说明: | SOP, |
Reach Compliance Code: | unknown | ECCN代码: | EAR99 |
HTS代码: | 8542.32.00.71 | 风险等级: | 5.84 |
Is Samacsys: | N | 最长访问时间: | 98 ns |
其他特性: | REGISTER BASED; BUBBLE BACK 2.7US | 周期时间: | 83.33 ns |
JESD-30 代码: | R-PDSO-G20 | 长度: | 12.8 mm |
内存密度: | 320 bit | 内存宽度: | 5 |
功能数量: | 1 | 端子数量: | 20 |
字数: | 64 words | 字数代码: | 64 |
工作模式: | ASYNCHRONOUS | 最高工作温度: | 125 °C |
最低工作温度: | -40 °C | 组织: | 64X5 |
输出特性: | 3-STATE | 可输出: | YES |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | SOP |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
并行/串行: | PARALLEL | 认证状态: | Not Qualified |
座面最大高度: | 2.65 mm | 最大供电电压 (Vsup): | 6 V |
最小供电电压 (Vsup): | 2 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | AUTOMOTIVE | 端子形式: | GULL WING |
端子节距: | 1.27 mm | 端子位置: | DUAL |
宽度: | 7.5 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74HC7404N | NXP |
获取价格 |
5-Bit x 64-word FIFO register; 3-state | |
74HC7404PW | NXP |
获取价格 |
暂无描述 | |
74HC7404T | PHILIPS |
获取价格 |
FIFO, 64X5, 81ns, Asynchronous, CMOS, PDSO20 | |
74HC74BQ | NXP |
获取价格 |
Dual D-type flip-flop with set and reset; positive-edge trigger | |
74HC74BQ | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-triggerProduction | |
74HC74BQ-Q100 | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-trigger | |
74HC74BZ | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-triggerProduction | |
74HC74D | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-triggerProduction | |
74HC74D | ONSEMI |
获取价格 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS | |
74HC74D | NXP |
获取价格 |
Dual D-type flip-flop with set and reset; positive-edge trigger |