5秒后页面跳转
74HC74D/G,118 PDF预览

74HC74D/G,118

更新时间: 2024-11-11 15:42:47
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
21页 174K
描述
74HC(T)74 - Dual D-type flip-flop with set and reset; positive-edge trigger SOIC 14-Pin

74HC74D/G,118 技术参数

Source Url Status Check Date:2013-10-15 00:00:00生命周期:Transferred
零件包装代码:SOIC包装说明:3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14
针数:14Reach Compliance Code:unknown
风险等级:5.65Is Samacsys:N
Base Number Matches:1

74HC74D/G,118 数据手册

 浏览型号74HC74D/G,118的Datasheet PDF文件第2页浏览型号74HC74D/G,118的Datasheet PDF文件第3页浏览型号74HC74D/G,118的Datasheet PDF文件第4页浏览型号74HC74D/G,118的Datasheet PDF文件第5页浏览型号74HC74D/G,118的Datasheet PDF文件第6页浏览型号74HC74D/G,118的Datasheet PDF文件第7页 
74HC74; 74HCT74  
Dual D-type flip-flop with set and reset; positive edge-trigger  
Rev. 4 — 27 August 2012  
Product data sheet  
1. General description  
The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have  
individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary  
nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time  
requirements on the LOW-to-HIGH clock transition, is stored in the flip-flop and appears at  
the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to  
slower clock rise and fall times. Inputs include clamp diodes that enable the use of current  
limiting resistors to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Input levels:  
For 74HC74: CMOS level  
For 74HCT74: TTL level  
Symmetrical output impedance  
Low power dissipation  
High noise immunity  
Balanced propagation delays  
Specified in compliance with JEDEC standard no. 7A  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Ordering information  
Table 1.  
Type number Package  
Temperature range Name  
Ordering information  
Description  
Version  
74HC74N  
40 C to +125 C  
DIP14  
plastic dual in-line package; 14 leads (300 mil)  
SOT27-1  
74HCT74N  
74HC74D  
40 C to +125 C  
40 C to +125 C  
SO14  
plastic small outline package; 14 leads; body width  
3.9 mm  
SOT108-1  
74HCT74D  
74HC74DB  
74HCT74DB  
SSOP14  
plastic shrink small outline package; 14 leads; body SOT337-1  
width 5.3 mm  
 
 
 

与74HC74D/G,118相关器件

型号 品牌 获取价格 描述 数据表
74HC74D/T3 NXP

获取价格

IC HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 3
74HC74DB NXP

获取价格

Dual D-type flip-flop with set and reset; positive-edge trigger
74HC74DB118 NXP

获取价格

Dual D-type flip-flop with set and reset; positive edge-trigger
74HC74DG ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
74HC74D-Q100 NEXPERIA

获取价格

Dual D-type flip-flop with set and reset; positive edge-trigger
74HC74DR2 ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
74HC74DR2G ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
74HC74D-T NXP

获取价格

Dual D-type flip-flop with set and reset; positive-edge trigger
74HC74DTR2 ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
74HC74DTR2G ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS