Datasheet > 74HC74BQ

74HC74BQ

更新时间： 2024-09-24 11:11:15

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
19页	294K
描述
Dual D-type flip-flop with set and reset; positive edge-triggerProduction

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74HC74BQ 数据手册

74HC74; 74HCT74

Dual D-type flip-flop with set and reset; positive edge-trigger

Rev. 8 — 9 February 2023

Product data sheet

1. General description

The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual

data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs.

Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock

transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock

input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp

diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of

V_CC

2. Features and benefits

•

Wide supply voltage range from 2.0 to 6.0 V

CMOS low power dissipation

High noise immunity

Input levels:

•

For 74HC74: CMOS level

For 74HCT74: TTL level

•

Symmetrical output impedance

High noise immunity

Balanced propagation delays

Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

Complies with JEDEC standards:

•

JESD8C (2.7 V to 3.6 V)

JESD7A (2.0 V to 6.0 V)

•

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

•

Multiple package options

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74HC74D

74HCT74D

-40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74HC74PW

74HCT74PW

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

SOT762-1

74HC74BQ

74HCT74BQ

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

12 3 4 5 6 7...19

中文翻译

下载PDF

与74HC74BQ相关器件

型号	品牌	获取价格	描述	数据表
74HC74BQ-Q100	NEXPERIA	获取价格	Dual D-type flip-flop with set and reset; positive edge-trigger
74HC74BZ	NEXPERIA	获取价格	Dual D-type flip-flop with set and reset; positive edge-triggerProduction
74HC74D	NEXPERIA	获取价格	Dual D-type flip-flop with set and reset; positive edge-triggerProduction
74HC74D	ONSEMI	获取价格	Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
74HC74D	NXP	获取价格	Dual D-type flip-flop with set and reset; positive-edge trigger
74HC74D	TOSHIBA	获取价格	Not Recommended for New Design
74HC74D,652	NXP	获取价格	74HC(T)74 - Dual D-type flip-flop with set and reset; positive-edge trigger SOIC 14-Pin
74HC74D,653	NXP	获取价格	74HC(T)74 - Dual D-type flip-flop with set and reset; positive-edge trigger SOIC 14-Pin
74HC74D/G,118	NXP	获取价格	74HC(T)74 - Dual D-type flip-flop with set and reset; positive-edge trigger SOIC 14-Pin
74HC74D/T3	NXP	获取价格	IC HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 3