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74AUP1T86GX PDF预览

74AUP1T86GX

更新时间: 2023-09-03 20:34:01
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
14页 231K
描述
Low-power 2-input EXCLUSIVE-OR gate with voltage-level translatorProduction

74AUP1T86GX 数据手册

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74AUP1T86  
Low-power 2-input EXCLUSIVE-OR gate with voltage-level  
translator  
Rev. 3 — 26 January 2022  
Product data sheet  
1. General description  
The 74AUP1T86 provides the single 2-input EXCLUSIVE-OR function. This device ensures a very  
low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.  
The 74AUP1T86 is designed for logic-level translation applications with input switching levels that  
accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply  
voltage.  
The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to  
2.3 V.  
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing the damaging backflow current through the device when it is  
powered down.  
Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire  
VCC range.  
2. Features and benefits  
Wide supply voltage range from 2.3 V to 3.6 V  
High noise immunity  
ESD protection:  
HBM JESD22-A114F Class 3A exceeds 5000 V  
CDM JESD22-C101E exceeds 1000 V  
Low static power consumption; ICC = 1.5 μA (maximum)  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial power-down mode operation  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP1T86GW -40 °C to +125 °C  
TSSOP5  
plastic thin shrink small outline package; 5 leads;  
body width 1.25 mm  
SOT353-1  
74AUP1T86GX -40 °C to +125 °C  
X2SON5  
plastic thermal enhanced extremely thin  
small outline package; no leads; 5 terminals;  
body 0.8 × 0.8 × 0.32 mm  
SOT1226-3  
 
 
 

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SPECIALTY LOGIC CIRCUIT, PDSO6