71V433S11PFG

更新时间： 2024-11-09 13:04:51

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
19页	263K
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71V433S11PFG 数据手册

IDT71V433

32K x 32

3.3V Synchronous SRAM

Flow-Through Outputs

Features

◆

32K x 32 memory configuration

The IDT71V433 SRAM contains write, data-input, address and

controlregisters.Therearenoregisters inthedataoutputpath(flow-

througharchitecture). Internallogicallows the SRAMtogenerate a

self-timed write based upon a decision which can be left until the

extreme end of the write cycle.

The burstmode feature offers the highestlevelofperformance to

thesystemdesigner,astheIDT71V433canprovidefourcyclesofdata

forasingleaddresspresentedtotheSRAM. Aninternalburstaddress

counteracceptsthefirstcycleaddressfromtheprocessor,initiatingthe

access sequence.Thefirstcycleofoutputdatawillflow-throughfrom

the arrayaftera clock-to-data access time delayfromthe risingclock

edgeofthesamecycle. Ifburstmodeoperationisselected(ADV=LOW),

the subsequent three cycles of output data will be available to the

user on the next three rising clock edges. The order of these three

addresses willbe definedbythe internalburstcounterandthe LBO

inputpin.

◆

Supports high performance system speed:

CommercialandIndustrial:

— 11 11ns Clock-to-DataAccess (50MHz)

— 12 12ns Clock-to-DataAccess (50MHz)

LBO input selects interleaved or linear burst mode

◆

Self-timed write cycle with global write control (GW), byte

write enable (BWE), and byte writes (BWx)

Power down controlled by ZZ input

Single 3.3V power supply (+10/-5%)

Packaged in a JEDEC Standard 100-pin rectangular plastic

◆

thin quad flatpack (TQFP).

Description

The IDT71V433 is a 3.3V high-speed 1,048,576-bit SRAM orga-

nized as 32K x 32 with full support of various processor interfaces

includingthePentium™andPowerPC™.Theflow-throughburstarchi-

tectureprovidescost-effective2-1-1-1performanceforprocessorsupto

50MHz.

The IDT71V433 SRAM utilizes IDT's high-performance 3.3V

CMOSprocess,andispackagedinaJEDECStandard14mmx20mm

100-pinthinplasticquadflatpack(TQFP).

PinDescription

A⁰–A¹⁴

Address Inputs

Input

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enable

CS⁰, CS¹

Chips Selects

Output Enable

Global Write Enable

Byte Write Enable

BWE

Individual Byte Write Selects

Clock Input

BW₁–BW₄

CLK

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Sleep Mode

Synchronous

ADV

ADSC

ADSP

LBO

Asynchronous

Synchronous

N/A

I/O⁰–I/O³¹

V^DD, V^DDQ

V^SS, V^SSQ

Data Input/Output

Core and I/O Power Supply (3.3V)

Array Ground, I/O Ground

Power

N/A

3729 tbl 01

PentiumisatrademarkofIntelCorp.

PowerPCisatrademarkofInternationalBusinessMachines,Inc.

AUGUST 2001

DSC-3729/04

12 3 4 5 6 7...19

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与71V433S11PFG相关器件

型号	品牌	获取价格	描述	数据表
71V433S11PFI	IDT	获取价格	32K x 32 3.3V Synchronous SRAM Flow-Through Outputs
71V433S12PF	IDT	获取价格	32K x 32 3.3V Synchronous SRAM Flow-Through Outputs
71V433S12PFI	IDT	获取价格	32K x 32 3.3V Synchronous SRAM Flow-Through Outputs
71V546	RENESAS	获取价格	3.3V 128K x 36 ZBT Synchronous PipeLined SRAM
71V546S100PF8	IDT	获取价格	ZBT SRAM, 128KX36, 5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
71V546S100PFG	IDT	获取价格	3.3V Synchronous SRAM
71V546S100PFG8	IDT	获取价格	Synchronous SRAM with ZBT Feature Burst Counter and Pipelined Outputs
71V546S100PFGI	IDT	获取价格	3.3V Synchronous SRAM
71V546S100PFGI8	IDT	获取价格	Synchronous SRAM with ZBT Feature Burst Counter and Pipelined Outputs
71V546S100PFI	IDT	获取价格	ZBT SRAM, 128KX36, 5ns, CMOS, PQFP100, PLASTIC, TQFP-100

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