Datasheet > 2N7002DWK

2N7002DWK

更新时间： 2023-12-06 20:02:27

品牌	Logo	应用领域
美台 - DIODES		/
页数	文件大小	规格书
7页	730K
描述
DUAL N-CHANNEL ENHANCEMENT MODE MOSFET

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数据手册

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2N7002DWK 数据手册

2N7002DWK

3.5

1.8

1.6

1.4

1.2

I_D= 1mA

2.5

V_GS= 4.5V, I_D= 150mA

I_D= 250μA

1.5

V_GS= 10V, I_D= 200mA

0.5

0.8

-50

-25

100 125 150

-50

-25

100 125 150

T_J, JUNCTION TEMPERATURE (℃)

Figure 8. Gate Threshold Variation vs. Junction

Temperature

Figure 7. On-Resistance Variation with Junction

Temperature

1000

100

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

V_GS= 0V

f = 1MHz

C_iss

C_oss

T_J= 125^oC

T_J= 85^oC

T_J= 25^oC

T_J= 150^oC

C_rss

T_J= -55^oC

0.3

0.6

0.9 1.2

1.5

V_DS, DRAIN-SOURCE VOLTAGE (V)

Figure 10. Typical Junction Capacitance

V_SD, SOURCE-DRAIN VOLTAGE (V)

Figure 9. Diode Forward Voltage vs. Current

R_DS(ON)

Limited

P_W= 100µs

0.1

P_W= 1ms

V_DS= 15V, I_D= 200mA

P_W= 10ms

P_W= 100ms

P_W= 1s

P_W= 10s

T_J(Max)= 150℃

T_A= 25℃

Single Pulse

DUT on

1*MRP Board

V_GS= 10V

0.01

0.001

0.2

0.4

0.6

Q_g(nC)

0.8

1.2

0.1

100

V_DS, DRAIN-SOURCE VOLTAGE (V)

Figure 12. SOA, Safe Operation Area

Figure 11. Gate Charge

4 of 7

www.diodes.com

December 2021

2N7002DWK

Document number: DS42970 Rev. 3 - 2

1 2 345 6 7

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