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UPA2727UT1A

更新时间： 2024-11-09 03:09:51
品牌 Logo 应用领域
日电电子 - NEC 晶体晶体管功率场效应晶体管开关脉冲光电二极管
页数 文件大小 规格书
6页 173K
描述
MOS FIELD EFFECT TRANSISTOR

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中文翻译

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UPA2727UT1A 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：HVSON-8Reach Compliance Code：compliant
风险等级：5.8Is Samacsys：N
雪崩能效等级（Eas）：26 mJ配置：SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：30 V最大漏极电流 (ID)：16 A
最大漏源导通电阻：0.015 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：R-PDSO-F8JESD-609代码：e0
元件数量：1端子数量：8
工作模式：ENHANCEMENT MODE封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED极性/信道类型：N-CHANNEL
最大脉冲漏极电流 (IDM)：96 A认证状态：Not Qualified
表面贴装：YES端子面层：TIN LEAD
端子形式：FLAT端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

UPA2727UT1A 数据手册

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DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
μPA2727UT1A  
SWITCHING  
N-CHANNEL POWER MOSFET  
PACKAGE DRAWING (Unit: mm)  
DESCRIPTION  
The μ PA2727UT1A is N-channel MOSFET designed for DC/DC converter applications.  
1
8
FEATURES  
2
3
4
7
6
5
• Low on-state resistance  
RDS(on)1 = 9.6 mΩ MAX. (VGS = 10 V, ID = 8 A)  
RDS(on)2 = 15 mΩ MAX. (VGS = 4.5 V, ID = 8 A)  
• Low QGD  
6
0.2  
0.10 S  
5.4 0.2  
QGD = 3.5 nC TYP. (VDD = 15 V, ID = 16 A)  
• Thin type surface mount package with heat spreader (8-pin HVSON)  
• RoHS Compliant  
1
0.2  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)  
Drain to Source Voltage (VGS = 0 V)  
Gate to Source Voltage (VDS = 0 V)  
Drain Current (DC)  
VDSS  
VGSS  
ID(DC)  
ID(pulse)  
PT1  
30  
V
V
1, 2, 3 : Source  
4
: Gate  
20  
5, 6, 7, 8: Drain  
16  
A
Drain Current (pulse) Note1  
96  
A
3.65 0.2  
0.6 0.15  
Total Power Dissipation Note2  
Total Power Dissipation (PW = 10 sec) Note2  
Channel Temperature  
1.5  
W
W
°C  
°C  
A
0.7 0.15  
PT2  
4.6  
150  
Tch  
Storage Temperature  
Tstg  
−55 to +150  
16  
EQUIVALENT CIRCUIT  
Single Avalanche Current Note3  
Single Avalanche Energy Note3  
IAS  
Drain  
EAS  
26  
mJ  
Body  
Diode  
THERMAL RESISTANCE  
Gate  
Channel to Ambient Thermal Resistance Note2  
Rth(ch-A)  
83.3  
2.0  
°C/W  
°C/W  
Channel to Case (Drain) Thermal Resistance  
Rth(ch-C)  
Source  
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%  
2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm  
3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH  
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade  
the device operation. Steps must be taken to stop generation of static electricity as much as possible, and  
quickly dissipate it once, when it has occurred.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. G18300EJ1V0DS00 (1st edition)  
Date Published May 2007 NS CP(K)  
Printed in Japan  
2006, 2007  
123456

中文翻译

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