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UPA2734GR-E2-AT

更新时间： 2024-11-06 21:17:43
品牌 Logo 应用领域
日电电子 - NEC 开关脉冲光电二极管晶体管
页数 文件大小 规格书
6页 161K
描述
Power Field-Effect Transistor, 7A I(D), 30V, 0.038ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, POWER, SOP-8

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中文翻译

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UPA2734GR-E2-AT 技术参数

是否Rohs认证： 符合生命周期：Transferred
零件包装代码：SOT包装说明：SMALL OUTLINE, R-PDSO-G8
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99风险等级：5.35
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：30 V
最大漏极电流 (ID)：7 A最大漏源导通电阻：0.038 Ω
FET 技术：METAL-OXIDE SEMICONDUCTORJESD-30 代码：R-PDSO-G8
JESD-609代码：e3元件数量：1
端子数量：8工作模式：ENHANCEMENT MODE
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
极性/信道类型：P-CHANNEL最大脉冲漏极电流 (IDM)：28 A
认证状态：Not Qualified表面贴装：YES
端子面层：MATTE TIN端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

UPA2734GR-E2-AT 数据手册

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DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
μPA2734GR  
SWITCHING  
P-CHANNEL POWER MOS FET  
DESCRIPTION  
PACKAGE DRAWING (Unit: mm)  
The μPA2734GR is P-Channel MOS Field Effect Transistor  
designed for DC/DC converter and power management  
applications.  
8
5
1, 2, ꢀ  
4
: Source  
: Gate  
5, 6, 7, 8 : Drain  
FEATURES  
• Low on-state resistance  
RDS(on)1 = 38 mΩ MAX. (VGS = −4.5 V, ID = −7.0 A)  
RDS(on)2 = 72 mΩ MAX. (VGS = −2.5 V, ID = −3.5 A)  
• Low input capacitance  
6.0 0.ꢀ  
4.4  
1
4
5.ꢀ7 MAX.  
0.8  
Ciss = 1130 pF TYP. (VDS = −10 V, VGS = 0 V)  
• Built-in gate protection diode  
• Small and surface mount package (Power SOP8)  
• RoHS Compliant  
0.5 0.2  
0.10  
1.27 0.78 MAX.  
+0.10  
0.40  
0.12 M  
–0.05  
ORDERING INFORMATION  
PART NUMBER  
μ PA2734GR-E1-AT  
μ PA2734GR-E2-AT  
LEAD PLATING  
Pure Sn  
PACKING  
PACKAGE  
Note  
Note  
Power SOP8  
0.08 g TYP.  
Tape 2500 p/reel  
Note Pb-free (This product does not contain Pb in external electrode and other parts.)  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)  
Drain to Source Voltage (VGS = 0 V)  
Gate to Source Voltage (VDS = 0 V)  
Drain Current (DC) Note1  
VDSS  
VGSS  
ID(DC)  
ID(pulse)  
PT1  
−30  
m12  
V
V
EQUIVALENT CIRCUIT  
m7  
A
Drain Current (pulse) Note2  
m28  
A
Drain  
Total Power Dissipation Note3  
Total Power Dissipation (PW = 10 sec) Note3  
Channel Temperature  
1.1  
W
W
°C  
°C  
PT2  
2.5  
Body  
Tch  
150  
Diode  
Gate  
Storage Temperature  
Tstg  
−55 to +150  
Gate  
Protection  
Diode  
Notes 1. VGS = −4.5 V  
Source  
2. PW ≤ 10 μs, Duty Cycle ≤ 1%  
3. Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt  
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.  
When this device actually used, an additional protection circuit is externally required if a voltage exceeding  
the rated voltage may be applied to this device.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. G19426EJ1V0DS00 (1st edition)  
Date Published September 2008 NS  
Printed in Japan  
2008  
123456

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