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UPA1702 PDF预览

UPA1702

更新时间: 2024-11-01 20:30:31
品牌 Logo 应用领域
日电电子 - NEC 开关脉冲光电二极管晶体管
页数 文件大小 规格书
8页 109K
描述
Power Field-Effect Transistor, 8A I(D), 30V, 0.025ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOP-8

UPA1702 技术参数

生命周期:Obsolete零件包装代码:SOT
包装说明:SMALL OUTLINE, R-PDSO-G8针数:8
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.83Is Samacsys:N
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:30 V
最大漏极电流 (ID):8 A最大漏源导通电阻:0.025 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-G8
元件数量:1端子数量:8
工作模式:ENHANCEMENT MODE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
极性/信道类型:N-CHANNEL最大脉冲漏极电流 (IDM):32 A
认证状态:Not Qualified表面贴装:YES
端子形式:GULL WING端子位置:DUAL
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

UPA1702 数据手册

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DATA SHEET  
MOS FIELD EFFECT POWER TRANSISTORS  
µPA1702  
SWITCHING  
N-CHANNEL POWER MOS FET  
INDUSTRIAL USE  
DESCRIPTION  
PACKAGE DIMENSIONS  
This product is N-Channel MOS Field Effect  
TransistordesignedforDC/DCconvertersandpower  
management applications of notebook computers.  
(in: millimeter)  
8
5
1, 2, 3  
4
; Source  
; Gate  
FEATURES  
5, 6, 7, 8 ; Drain  
Low On-Resistance.  
R
R
DS(on)1 = 15 mMax. (VGS = 10 V, I  
DS(on)2 = 25 mMax. (VGS = 4 V, I  
D
= 4.0 A)  
D
= 4.0 A)  
6.0 ±0.3  
4.4  
1
4
Low Ciss Ciss = 1300 pF Typ.  
Built-in G-S Protection Diode  
5.37 Max.  
0.8  
Small and Surface Mount Package  
(Power SOP8)  
0.5 ±0.2  
0.10  
1.27 0.78 Max.  
+0.10  
–0.05  
0.40  
0.12 M  
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C, all terminals are connected)  
Drain  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current (DC)  
VDSS  
VGSS  
ID(DC)  
ID(pulse)  
PT  
30  
±20  
V
V
Body  
Diode  
±8.0  
A
Gate  
Drain Current (pulse)*  
±32  
A
Gate  
Protection  
Diode  
Total Power Dissipation (TA = 25 ˚C) **  
Channel Temperature  
2.0  
W
˚C  
˚C  
Source  
Tch  
150  
Storage Temperature  
Tstg  
–55 to +150  
*
PW 10 µs, Duty Cycle 1 %  
** Mounted on ceramic substrate of 1200 mm2 × 0.7 mm  
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this  
device acutally used, an additional protection circuit is externally required if voltage exceeding the rated voltage may  
be applied to this device.  
The information in this document is subject to change without notice.  
Document No. G10622EJ2V0DS00  
Date Published April 1996 P  
Printed in Japan  
1996  
©

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