TSM4N60
600V N-Channel Power MOSFET
TO-220
ITO-220
TO-251
(IPAK)
TO-252
(DPAK)
Pin Definition:
1. Gate
PRODUCT SUMMARY
2. Drain
3. Source
VDS (V)
RDS(on)(Ω)
ID (A)
600
2.5 @ VGS =10V
2
General Description
The TSM4N60 is produced using advanced planar stripe, DMOS technology. This latest technology has been
especially designed to minimize on-state resistance, have a high rugged avalanche characteristics. There devices are
well suited for high efficiency switch mode power supplies, active power factor correction, electronic lamp ballasts
base on half bridge topology.
Block Diagram
Features
●
●
●
●
Robust high voltage termination
Avalanche energy specified
Diode is characterized for use in bridge circuits
Source to Drain diode recovery time comparable to a
discrete fast recovery diode.
Ordering Information
Part No.
Package
Packing
50pcs / Tube
TSM4N60CZ C0
TSM4N60CI C0
TSM4N60CH C5
TSM4N60CP RO
TO-220
ITO-220
TO-251
TO-252
50pcs / Tube
80pcs / Tube
N-Channel MOSFET
2.5Kpcs / 13” Reel
Absolute Maximum Rating (Ta = 25oC unless otherwise noted)
Parameter
Drain-Source Voltage
Symbol
Limit
600
±30
4
Unit
V
VDS
VGS
ID
Gate-Source Voltage
V
Continuous Drain Current
A
Pulsed Drain Current
IDM
16
A
Single Pulse Drain to Source Avalanche Energy
(VDD = 50V, IAS=4A, L=27.5mH, RG=25Ω), Starting TJ = 25oC
Repetitive Avalanche Energy
EAS
EAR
dv/dt
240
10
mJ
mJ
(Pulse width limited by junction temperature)
Peak Diode Recovery dv/dt
4.5
70
V/ns
(ISD ≤ 4A, di/dt ≤ 200A/us, VDD ≤ BVDSS) Starting TJ=25ºC
TO-220 / TO-251 / TO-252
ITO-220
Maximum Power Dissipation
@Ta = 25oC
PD
W
25
Operating Junction Temperature
TJ
+150
oC
oC
Operating Junction and Storage Temperature Range
TJ, TSTG
-55 to +150
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Version: A07