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TSB11C01DL PDF预览

TSB11C01DL

更新时间： 2024-09-15 15:55:07
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
19页 263K
描述
IEEE 1394-1995, 5V, 3-Port, 100Mbps Physical Layer Controller 56-SSOP

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TSB11C01DL 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP56,.4针数：56
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.61差分输出：YES
驱动器位数：6输入特性：DIFFERENTIAL
接口集成电路类型：LINE TRANSCEIVER接口标准：IEEE 1394
JESD-30 代码：R-PDSO-G56长度：18.415 mm
功能数量：1端子数量：56
最高工作温度：70 °C最低工作温度：
最大输出低电流：0.012 A封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP56,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified最大接收延迟：
接收器位数：6座面最大高度：2.79 mm
子类别：Line Driver or Receivers最大压摆率：140 mA
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

TSB11C01DL 数据手册

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TSB11C01  
IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER  
SLLS167A – MARCH 1994 – REVISED MARCH 1996  
DL PACKAGE  
Supports Provisions of IEEE 1394-1995 for  
(TOP VIEW)  
High-Performance Serial Bus  
Fully Interoperable With FireWire  
Implementation of IEEE 1394-1995  
CPS  
TPA1  
TPA1  
TPB1  
TPB1  
TPA2  
TPA2  
TPB2  
1
2
3
4
5
6
7
8
9
56  
55  
54  
53  
52  
51  
50  
AV  
CC  
Provides Three Fully Compliant Cable  
Ports at 100 Mbits Per Second (Mbits/s)  
AV  
CC  
XI  
Cable Ports Monitor Line Conditions for  
Active Connection to Remote Node  
XO  
AV  
AV  
CC  
CC  
Inactive Ports Disabled to Save Power  
PDOUT  
VCOIN  
TESTM2 10  
RESET  
ISO  
49 TPB2  
48 TPA3  
47 TPA3  
Logic Performs System Initialization and  
Arbitration Functions  
Encode and Decode Functions Included for  
Data Strobe Bit Level Encoding  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
TPB3  
TPB3  
AGND  
AGND  
AGND  
AGND  
AGND  
R0  
R1  
PC2  
TPBIAS  
PC1  
PC0  
Incoming Data Resynchronized to Local  
Clock  
AGND  
AGND  
AGND  
AGND  
AGND  
DGND  
LPS  
DGND  
LREQ  
TESTM1  
Interface to Link Layer Controller Supports  
Optional Electrical Isolation  
Data Interface to Link Layer Controller  
Provided Through Two Parallel Lines at  
50 Mbits/s  
25-MHz Crystal Oscillator and PLL Provide  
Transmit, Receive Data, and Link Layer  
Controller Clocks at 50 MHz  
DV  
CC  
Selectable Oscillator Input for External  
100-MHz Reference Signal  
SYSCLK  
CTL0  
CTL1  
D0  
DV  
CC  
CLK100  
ENCLK100  
DGND  
Node Power Class Information Signaling  
for System Power Management  
Cable Power Presence Monitoring  
D1  
C/LKON  
Cable Bias and Driver Termination Voltage  
Supply  
Single 5-V Supply Operation  
Separate Multiple Package Terminals  
Provided for Analog and Digital Supplies  
and Grounds  
High-Performance 56-Pin SSOP (DL)  
Package  
description  
The TSB11C01 provides the analog transceiver functions needed to implement a 3-port node in a cable-based  
IEEE 1394-1995 network. Each cable port incorporates two differential line transceivers. The transceivers  
include circuitry to monitor the line conditions needed for determining connection status, for initialization and  
arbitration, and for packet reception and transmission. The TSB11C01 is designed to interface with a link layer  
controller, such as the TSB12C01A.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
FireWire is a trademark of Apple Computer, Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...19

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