TSB11LV01

更新时间： 2024-11-04 22:10:03

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
21页	321K
描述
3-V 1-PORT IEEE 1394-1995 CABLE TRANSCEIVER/ARBITER

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TSB11LV01 数据手册

TSB11LV01

3-V 1-PORT IEEE 1394-1995 CABLE TRANSCEIVER/ARBITER

SLLS232B – MARCH 1996 – REVISED MAY 1997

Supports Provisions of IEEE 1394-1995

Standard for High Performance Serial Bus

Data Interface to Link Layer Controller

(Link) Provided Through Two Parallel

Signal Lines at 50 Mbits/s

†

Fully Interoperable With FireWire

Implementation of IEEE 1394-1995

25-MHz Crystal Oscillator and PLL Provide

Transmit, Receive Data, and Link Layer

Controller Clocks at 50 MHz

Provides A Single Fully-Compliant Cable

Port at 100 Megabits per Second (Mbits/s)

Digital I/Os are 5 V tolerant

Cable Port Monitors Line Conditions for

Active Connection to a Remote Node

Node Power Class Information Signaling

for System Power Management

Inactive Port Disabled to Save Power

Cable Power Presence Monitoring

Cable Inactivity Monitor Output and

Power-down Input Provided for Additional

Sleep-Mode Power Savings

Cable Bias and Driver Termination Voltage

Supply

Internal Bandgap Reference Provided for

Setting Stable Operating Bias Conditions

Single 3-V Supply Operation

Separate Multiple Package Terminals

Provided for Analog and Digital Supplies

and Grounds

Logic Performs System Initialization and

Arbitration Functions

Encode and Decode Functions Included for

Data-Strobe Bit-Level Encoding

High Performance 48-Pin TQFP (PT)

Package

Incoming Data Resynchronized to Local

Clock

description

The TSB11LV01 provides the analog transceiver functions needed to implement a single port node in a cable

based IEEE 1394-1995 network. The cable port incorporates two differential line transceivers. The transceivers

include circuitry to monitor the line conditions as needed for determining connection status, for initialization and

arbitration, and for packet reception and transmission. The TSB11LV01 is designed to interface with a link layer

controller, such as the TSB12C01A.

The TSB11LV01 requires an external 24.576-MHz crystal, which drives an internal phase-locked loop (PLL)

generating the required 98.304-MHz reference signal. The 98.304-MHz reference signal is internally divided

to provide the 49.152-MHz ±100 ppm system clock signals that control transmission of the outbound encoded

strobe and data information. The 49.152-MHz clock signal is also supplied to the associated link for

synchronization of the two chips and is used for resynchronization of the received data. The power-down

function, when enabled by asserting the PWRDN terminal high, stops operation of the PLL.

Data bits to be transmitted are received from the link on two parallel paths and are latched internally in the

TSB11LV01 in synchronization with the 49.152-MHz system clock. These bits are combined serially, encoded,

and transmitted at 98.304-Mbits/s as the outbound data-strobe information stream. During transmit, the

encoded data information is transmitted differentially on the TPB cable pair, and the encoded strobe information

is transmitted differentially on the TPA cable pair.

NOTE

In this document, phy is the physical layer and link is the link layer controller.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

†

Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thomson, Limited.

FireWire is a trademark of Apple Computer, Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...21

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与TSB11LV01相关器件

型号	品牌	获取价格	描述	数据表
TSB11LV01PT	TI	获取价格	3-V 1-PORT IEEE 1394-1995 CABLE TRANSCEIVER/ARBITER
TSB12	ETC	获取价格	EURO TERMINAL BLOCKS
TSB120	SURGE	获取价格	Trans Voltage Suppressor Diode, 600W, Unidirectional, 1 Element, Silicon, DO-214AA,
TSB120A	SURGE	获取价格	Trans Voltage Suppressor Diode, 600W, Unidirectional, 1 Element, Silicon, DO-214AA,
TSB120C	SURGE	获取价格	Trans Voltage Suppressor Diode, 600W, Bidirectional, 1 Element, Silicon, DO-214AA,
TSB12A	SURGE	获取价格	Trans Voltage Suppressor Diode, 600W, Unidirectional, 1 Element, Silicon, DO-214AA,
TSB12C	SURGE	获取价格	Trans Voltage Suppressor Diode, 600W, Bidirectional, 1 Element, Silicon, DO-214AA,
TSB12C01A	TI	获取价格	High-Speed Serial-Bus Link-Layer Controller
TSB12C01AIPZ	TI	获取价格	High Performance 5V Link Layer with 32-bit host I/F, 2K FIFOs 100-LQFP -40 to 85
TSB12C01AMWN	TI	获取价格	1 CHANNEL(S), 400Mbps, SERIAL COMM CONTROLLER, CQFP100, CERAMIC, QFP-100

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