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STW52N60DM6 PDF预览

STW52N60DM6

更新时间: 2023-12-20 18:45:00
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
12页 232K
描述
N-channel 600 V, 64 mOhm typ., 45 A MDmesh DM6 Power MOSFET in a TO-247 package

STW52N60DM6 数据手册

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STW52N60DM6  
Electrical characteristics  
2
Electrical characteristics  
TC = 25 °C unless otherwise specified.  
Table 4. On/off states  
Symbol  
Parameter  
Test conditions  
Min.  
Typ. Max. Unit  
V
V
GS  
V
GS  
V
GS  
V
DS  
V
DS  
V
GS  
= 0 V, I = 1 mA  
Drain-source breakdown voltage  
600  
V
(BR)DSS  
D
= 0 V, V = 600 V  
1
µA  
µA  
µA  
V
DS  
I
Zero gate voltage drain current  
DSS  
= 0 V, V = 600 V, T = 125 °C(1)  
100  
±5  
DS  
C
I
= 0 V, V = ±25 V  
Gate-body leakage current  
Gate threshold voltage  
GSS  
GS  
V
= V , I = 250 µA  
3.25  
4.00  
64  
4.75  
74  
GS(th)  
DS(on)  
GS  
D
R
= 10 V, I = 22.5 A  
D
Static drain-source on-resistance  
mΩ  
1. Defined by design, not subject to production test.  
Table 5. Dynamic  
Symbol  
Parameter  
Input capacitance  
Test conditions  
Min.  
Typ. Max. Unit  
C
iss  
-
-
-
-
-
-
-
-
2468  
178  
1.47  
416  
1.6  
52  
-
-
-
-
-
-
-
-
pF  
pF  
pF  
pF  
C
oss  
V
V
= 100 V, f = 1 MHz, V = 0 V  
Output capacitance  
DS  
GS  
C
rss  
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
Total gate charge  
(1)  
= 0 to 480 V, V = 0 V  
C
oss eq.  
DS  
GS  
R
G
f = 1 MHz, I = 0 A  
D
Q
g
nC  
nC  
nC  
V
DD  
= 480 V, I = 40 A, V = 0 to 10 V  
D GS  
Q
Gate-source charge  
16  
gs  
(see Figure 14. Test circuit for gate  
charge behavior)  
Q
Gate-drain charge  
19  
gd  
1.  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V increases from 0  
oss DS  
to 80% V  
.
DSS  
Table 6. Switching times  
Test conditions  
Symbol  
Parameter  
Min.  
Typ. Max. Unit  
t
Turn-on delay time  
Rise time  
-
-
-
-
20.8  
13.7  
65.7  
10  
-
-
-
-
ns  
ns  
ns  
ns  
V
= 300 V, I = 20 A,  
d(on)  
DD  
D
R
= 4.7 Ω, V = 10 V  
t
G
GS  
r
(see Figure 13. Test circuit for  
resistive load switching times and  
Figure 18. Switching time waveform)  
t
Turn-off delay time  
Fall time  
d(off)  
t
f
DS13632 - Rev 1  
page 3/12  
 
 
 

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