Datasheet > STD410S

STD410S

更新时间： 2024-11-24 06:14:35

品牌	Logo	应用领域
三合微科 - SAMHOP		晶体晶体管场效应晶体管
页数	文件大小	规格书
8页	365K
描述
N-Channel Logic Level Enhancement Mode Field Effect Transistor

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数据手册

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STD410S 数据手册

S TU/D410S

S amHop Microelectronics C orp.

Mar. 26 2007

N-C hannel Logic Level E nhancement Mode Field E ffect Transistor

FE ATUR E S

PR ODUCT S UMMAR Y

S uper high dense cell design for low R DS (ON).

VDS S

R DS (ON) ( m

)

Ω

Max

R ugged and reliable.

S urface Mount P ackage.

E S D P rotected.

20 @ VG S = 10V

30 @ VG S = 4.5V

30A

40V

S TU S E R IE S

TO-252AA(D-P AK)

S TD S E R IE S

TO-251(l-P AK)

ABS OLUTE MAXIMUM R ATING S (T =25 C unless otherwise noted)

Limit

Unit

P arameter

S ymbol

Drain-S ource Voltage

G S

G ate-S ource Voltage

Drain C urrent-C ontinuous @ T

=25 C

-P ulsed ^b

100

Drain-S ource Diode Forward C urrent

@ Tc=25 C

Maximum P ower Dissipation

Operating and S torage

Temperature R ange

-55 to 175

TJ , TS TG

THE R MAL C HAR AC TE R IS TIC S

Thermal R esistance, J unction-to-C ase

C/W

J C

J A

Thermal R esistance, J unction-to-Ambient

12 3 4 5 6 7 8

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