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STD2NC70Z-1 PDF预览

STD2NC70Z-1

更新时间: 2024-09-19 22:08:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
10页 449K
描述
N-CHANNEL 700V - 4.1ohm - 2.3A DPAK/IPAK Zener-Protected PowerMESH⑩III MOSFET

STD2NC70Z-1 技术参数

生命周期:Obsolete零件包装代码:TO-251
包装说明:IN-LINE, R-PSIP-T3针数:3
Reach Compliance Code:compliantECCN代码:EAR99
风险等级:5.64雪崩能效等级(Eas):165 mJ
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:700 V
最大漏极电流 (Abs) (ID):2.3 A最大漏极电流 (ID):2.3 A
最大漏源导通电阻:4.7 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码:TO-251JESD-30 代码:R-PSIP-T3
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:IN-LINE极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):55 W最大脉冲漏极电流 (IDM):9.2 A
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:NO端子形式:THROUGH-HOLE
端子位置:SINGLE晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

STD2NC70Z-1 数据手册

 浏览型号STD2NC70Z-1的Datasheet PDF文件第2页浏览型号STD2NC70Z-1的Datasheet PDF文件第3页浏览型号STD2NC70Z-1的Datasheet PDF文件第4页浏览型号STD2NC70Z-1的Datasheet PDF文件第5页浏览型号STD2NC70Z-1的Datasheet PDF文件第6页浏览型号STD2NC70Z-1的Datasheet PDF文件第7页 
STD2NC70Z  
STD2NC70Z-1  
N-CHANNEL 700V - 4.1- 2.3A DPAK/IPAK  
Zener-Protected PowerMESH™III MOSFET  
TYPE  
V
DSS  
R
I
D
DS(on)  
STD2NC70Z  
STD2NC70Z-1  
700V  
700V  
< 4.7Ω  
< 4.7Ω  
2.3 A  
2.3 A  
TYPICAL R (on) = 4.1Ω  
DS  
3
3
EXTREMELY HIGH dv/dt AND CAPABILITY  
GATE TO - SOURCE ZENER DIODES  
100% AVALANCHE TESTED  
VERY LOW GATE INPUT RESISTANCE  
GATE CHARGE MINIMIZED  
1
2
1
DPAK  
IPAK  
(Add Suffix “T4” for Tape & Reel)  
DESCRIPTION  
The third generation of MESH OVERLAY™ Power  
MOSFETs for very high voltage exhibits unsur-  
passed on-resistance per unit area while integrat-  
ing back-to-back Zener diodes between gate and  
source. Such arrangement gives extra ESD capa-  
bility with higher ruggedness performance as re-  
quested by a large variety of single-switch  
applications.  
APPLICATIONS  
SINGLE-ENDED SMPS IN MONITORS,  
COMPUTER AND INDUSTRIAL APPLICATION  
WELDING EQUIPMENT  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
V
V
DS  
Drain-source Voltage (V = 0)  
700  
700  
GS  
V
Drain-gate Voltage (R = 20 k)  
V
DGR  
GS  
V
Gate- source Voltage  
± 25  
2.3  
V
GS  
I
Drain Current (continuos) at T = 25°C  
A
D
C
I
Drain Current (continuos) at T = 100°C  
1.45  
9.2  
A
D
C
I
( )  
Drain Current (pulsed)  
A
DM  
P
TOT  
Total Dissipation at T = 25°C  
55  
W
C
Derating Factor  
0.44  
±50  
W/°C  
mA  
KV  
I
Gate-source Current (DC)  
GS  
V
Gate source ESD(HBM-C=100pF, R=1.5KΩ)  
Peak Diode Recovery voltage slope  
Storage Temperature  
1.5  
ESD(G-S)  
dv/dt (1)  
3
V/ns  
°C  
T
stg  
–65 to 150  
150  
T
Max. Operating Junction Temperature  
°C  
j
(•)Pulse width limited by safe operating area  
(1)I 2.3A, di/dt 100A/µs, V  
V , T T  
(BR)DSS j JMAX  
SD  
DD  
April 2001  
1/10  

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