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SSM3K309T(TE85L)

更新时间: 2024-02-11 12:45:36
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
5页 231K
描述
TRANSISTOR,MOSFET,N-CHANNEL,20V V(BR)DSS,4.7A I(D),TO-236AB

SSM3K309T(TE85L) 技术参数

是否Rohs认证: 不符合生命周期:Lifetime Buy
包装说明:,Reach Compliance Code:unknown
风险等级:5.84配置:Single
最大漏极电流 (Abs) (ID):4.7 AFET 技术:METAL-OXIDE SEMICONDUCTOR
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):0.7 W
子类别:FET General Purpose Powers表面贴装:YES
Base Number Matches:1

SSM3K309T(TE85L) 数据手册

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SSM3K309T  
TOSHIBA Field-Effect Transistor Silicon N-Channel MOS Type  
SSM3K309T  
Power Management Switch Applications  
High-Current Switching Applications  
Unit: mm  
1.8V drive  
Low on-resistance : R = 47m(max) (@V  
= 1.8V)  
= 2.5V)  
= 4.0V)  
on  
GS  
GS  
GS  
: R = 35m(max) (@V  
on  
: R = 31m(max) (@V  
on  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristic  
Drain–source voltage  
Symbol  
Rating  
Unit  
V
20  
±12  
V
V
DS  
Gate–source voltage  
V
GSS  
DC  
I
4.7  
D
Drain current  
A
Pulse  
I
9.4  
DP  
Drain power dissipation  
Channel temperature  
P
(Note 1)  
700  
mW  
°C  
D
T
ch  
150  
Storage temperature range  
T
stg  
55~150  
°C  
Note: Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
JEDEC  
JEITA  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling  
Precautions”/“Derating Concept and Methods”) and individual  
reliability data (i.e. reliability test report and estimated failure  
rate, etc).  
TOSHIBA  
2-3S1A  
Weight: 10 mg (typ.)  
Note 1: Mounted on an FR4 board.  
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm2)  
Electrical Characteristics (Ta = 25°C)  
Characteristic  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
V
I
I
= 1 mA, V  
= 1 mA, V  
= 0  
20  
12  
1
(BR) DSS  
(BR) DSX  
D
D
GS  
GS  
Drain–source breakdown voltage  
V
V
= -12 V  
Drain cutoff current  
I
V
V
V
V
=20 V, V  
= 0  
μA  
μA  
V
DSS  
GSS  
DS  
GS  
DS  
DS  
GS  
Gate leakage current  
Gate threshold voltage  
Forward transfer admittance  
I
= ±12 V, V  
= 0  
±1  
1.0  
31  
35  
47  
DS  
V
= 3 V, I = 1 mA  
0.35  
13  
th  
D
|Y |  
fs  
= 3 V, I = 4.0A  
(Note2)  
(Note2)  
(Note2)  
(Note2)  
25  
S
D
I
I
I
= 4.0 A, V  
= 3.0 A, V  
= 1.0 A, V  
= 4.0 V  
= 2.5 V  
= 1.8 V  
22  
D
D
D
GS  
GS  
GS  
Drain–source ON-resistance  
R
mΩ  
25  
DS (ON)  
30  
Input capacitance  
C
V
V
V
= 10 V, V  
= 10 V, V  
= 10 V, V  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
= 0, f = 1 MHz  
1020  
175  
160  
23  
pF  
pF  
pF  
iss  
DS  
DS  
DS  
GS  
GS  
GS  
Output capacitance  
C
oss  
Reverse transfer capacitance  
C
rss  
Turn-on time  
Switching time  
t
t
on  
V
V
= 10 V, I = 2A  
DD  
GS  
D
ns  
V
= 0~2.5 V, R = 4.7 Ω  
Turn-off time  
34  
G
off  
Drain–source forward voltage  
Note2: Pulse test  
V
I
= -4.7 A, V = 0  
GS  
(Note2)  
-0.85  
-1.2  
DSF  
D
1
2007-11-01  

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