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SN74ALVCH16541DGGR PDF预览

SN74ALVCH16541DGGR

更新时间： 2024-09-15 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 460K
描述
ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, TSSOP-48

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SN74ALVCH16541DGGR 技术参数

生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP,针数：48
Reach Compliance Code：unknown风险等级：5.84
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G48
长度：12.5 mm逻辑集成电路类型：BUS DRIVER
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL宽度：6.1 mm
Base Number Matches：1

SN74ALVCH16541DGGR 数据手册

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SN74ALVCH16541  
16-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
SCES031B – JULY 1995 – REVISED FEBRUARY 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
D
D
D
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1OE2  
1A1  
1A2  
GND  
1A3  
1A4  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
40  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
1Y5  
1Y6  
1A5  
1A6  
description  
GND 10  
39 GND  
1Y7  
1Y8  
1A7  
1A8  
11  
12  
38  
37  
This 16-bit buffer/driver is designed for 1.65-V to  
3.6-V V operation.  
CC  
2Y1 13  
2Y2 14  
GND 15  
2Y3 16  
2Y4 17  
36 2A1  
35 2A2  
34 GND  
33 2A3  
32 2A4  
The SN74ALVCH16541 is a noninverting 16-bit  
buffer composed of two 8-bit sections with  
separate output-enable signals. For either 8-bit  
buffer section, the output enables (1OE1 and  
1OE2or2OE1and2OE2)mustbothbelowforthe  
corresponding Y outputs to be active. If either  
output-enable input is high, the outputs of that  
8-bit buffer section are in the high-impedance  
state.  
V
18  
31  
V
CC  
CC  
2Y5 19  
2Y6 20  
GND 21  
2Y7 22  
2Y8 23  
2OE1 24  
30 2A5  
29 2A6  
28 GND  
27 2A7  
26 2A8  
25 2OE2  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
Active bus-hold circuitry is provided to hold  
unused or floating data inputs at a valid logic level.  
The SN74ALVCH16541 is characterized for  
operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit section)  
INPUTS  
OUTPUT  
Y
OE2  
L
A
L
OE1  
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
3–205  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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与SN74ALVCH16541DGGR相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH16541DL TI

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 		ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, 0.300 INCH, PLASTIC, SSOP-48
SN74ALVCH16543 TI

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 		16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH16543DGG TI

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 		16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH16543DGGR TI

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 		16-Bit Registered Transceiver With 3-State Outputs 56-TSSOP -40 to 85
SN74ALVCH16543DL TI

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 		16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH16543DLR TI

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 		具有三态输出的 16 位寄存收发器 | DL | 56 | -40 to 85
SN74ALVCH16600 TI

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 		18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH16600DGG TI

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 		18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH16600DGGR TI

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 		ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSS
SN74ALVCH16600DL TI

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 		18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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